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參數(shù)資料
| 型號： | X24640P-1.8 |
| 英文描述： | 400KHz 2-Wire Serial E 2 PROM with Block Lock |
| 中文描述： | 400kHz的2線串行E的2座鎖胎膜早破 |
| 文件頁數(shù)： | 9/17頁 |
| 文件大?。?/td> | 85K |
| 代理商： | X24640P-1.8 |
X24640
9
WRITE PROTECT REGISTER (WPR)
Writing to the Write Protect Register
The Write Protect Register can only be modified by
performing a “Byte Write” operation directly to the
address FFFFh as described below.
The Data Byte must contain zeroes where indicated in
the procedural descriptions below; otherwise the oper-
ation will not be performed. Only one Data Byte is
allowed for each register write operation. The part will
not acknowledge any data bytes after the first byte is
entered. The user then has to issue a stop to initiate
the nonvolatile write cycle that writes BL0, BL1, and
WPEN to the nonvolatile bits. A stop must also be
issued after volatile register write operations to put the
device into Standby.
The state of the Write Protect Register can be read by
performing a random byte read at FFFFh at any time.
The part will reset itself after the first byte is read. The
master should supply a stop condition to be consistent
with the protocol, but a stop is not required to end this
operation. After the read, the address counter contains
0000h.
Write Protect Register: WPR (ADDR = FFFF
h
)
WEL: Write Enable Latch (Volatile)
0 = Write Enable Latch reset, writes disabled.
1 = Write Enable Latch set, writes enabled.
RWEL: Register Write Enable Latch (Volatile)
0 = Register Write Enable Latch reset, writes to the
Write Protect Register disabled.
1 = Register Write Enable Latch set, writes to the Write
Protect Register enabled.
BL0, BL1: Block Lock Protect Bits (Nonvolatile)
The Block Lock Protect Bits, BL0 and BL1, determine
which blocks of the array are protected. A write to a
protected block of memory is ignored, but will receive
an acknowledge. The master must issue a stop to put
the part into standby, just as it would for a valid write;
but the stop will not initiate an internal nonvolatile write
cycle. See figure 11.
WPEN: Write Protect Enable Bit (Nonvolatile)
The Write Protect (WP) pin and the Write Protect
Enable (WPEN) bit in the Write Protect Register
control the Programmable Hardware Write Protection
feature. Hardware Write Protection is enabled when
the WP pin is HIGH and the WPEN bit is HIGH, and
disabled when either the WP pin is LOW or the WPEN
bit is LOW. Figure 12 defines the write protect status
for each combination of WPEN and WP. When the
chip is Hardware Write Protected, nonvolatile writes
are disabled to the Write Protect Register, including
the Block Lock Protect bits and the WPEN bit itself, as
well as to the Block Lock protected sections in the
memory array. Only the sections of the memory array
that are not Block Lock protected, and the volatile bits
WEL and RWEL, can be written.
In Circuit Programmable ROM Mode
Note that when the WPEN bit is write protected, it
cannot be changed back to a LOW state; so write
protection is enabled as long as the WP pin is held
HIGH. Thus an In Circuit Programmable ROM function
can be implemented by hardwiring the WP pin to V
CC
,
writing to and Block Locking the desired portion of the
array to be ROM, and then programming the WPEN bit
HIGH.
Unused Bit Positions
Bits 0, 5 & 6 are not used. All writes to the WPR must
have zeros in these bit positions. The data byte output
during a WPR read will contain zeros in these bits.
Writing to the WEL and RWEL bits
WEL and RWEL are volatile latches that power up in
the LOW (disabled) state. While the WEL bit is LOW,
writes to any address other than FFFFh will be ignored
(no acknowledge will be issued after the Data Byte).
The WEL bit is set by writing 00000010 to address
FFFFh. Once set, WEL remains HIGH until either it is
reset to 0 (by writing 00000000 to FFFFh) or until the
part powers up again. Writes to WEL and RWEL do
not cause a nonvolatile write cycle, so the device is
ready for the next operation immediately after the stop
condition.
The RWEL bit controls writes to the Block Lock Protect
bits, BL0 and BL1, and the WPEN bit. If RWEL is 0
then no writes can be performed on BL0, BL1, or
WPEN. RWEL is reset when the device powers up or
after any nonvolatile write, including writes to the Block
Lock Protect bits, WPEN bit, or any bytes in the
memory array. When RWEL is set, WEL cannot be
7
6
5
4
3
2
1
0
WPEN
0
0
BL1
BL0
RWEL
WEL
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X24640PI | 400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640PI-1.8 | 400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640PI-2.5 | 400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640S8 | 400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640S8I | 400KHz 2-Wire Serial E 2 PROM with Block Lock |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X24640P-2.5 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640PI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640PI-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640PI-2.5 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:400KHz 2-Wire Serial E 2 PROM with Block Lock |
| X24640S8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:400KHz 2-Wire Serial E 2 PROM with Block Lock |
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