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參數(shù)資料
| 型號： | X24256S8 |
| 英文描述： | 20V Single N-Channel HEXFET Power MOSFET in a SO-8 package; Similar to IRF7459 with lead free packaging. |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 144K |
| 代理商： | X24256S8 |
X24256
Characteristics subject to change without notice.
5 of 18
Figure 4. Device Addressing
1
S1
S0
R/W
DEVICE
SELECT
0
1
0
0
DEVICE TYPE
IDENTIFIER
SLAVE ADDRESS BYTE
D7
D2
D1
D6
D5
D4
D3
DATA BYTE
A2
A1
A0
A5
LOW ORDERWORD ADDRESS
A4
A3
WORD ADDRESS BYTE 0
0
A10
A9
A8
A14
HIGH ORDER WORD ADDRESS
A11
X24256WORD ADDRESS BYTE 1
A13
A12
A7
A6
D0
WRITE OPERATIONS
Byte Write
For a write operation, the device follows “3 byte” proto-
col, consisting of one Slave Address Byte, one Word
Address Byte 1, and the Word Address Byte 0, which
gives the master access to any one of the words in the
array. Upon receipt of the Word Address Byte 0, the
device responds with an acknowledge, and waits for
the first eight bits of data. After receiving the 8 bits of
the data byte, the device again responds with an
acknowledge. The master then terminates the transfer
by generating a stop condition, at which time the
device begins the internal write cycle to the nonvolatile
memory. While the internal write cycle is in progress
the device inputs are disabled and the device will not
respond to any requests from the master. The SDA pin
is at high impedance. See Figure 5.
Page Write
The device is capable of a 64 byte page write opera-
tion. It is initiated in the same manner as the byte write
operation; but instead of terminating the write opera-
tion after the first data word is transferred, the master
can transmit up to sixty-three more words. The device
will respond with an acknowledge after the receipt of
each word, and then the byte address is internally
incremented by one. The page address remains con-
stant. When the counter reaches the end of the page,
it “rolls over” and goes back to the first byte of the cur-
rent page. This means that the master can write 64
bytes to the page beginning at any byte. If the master
begins writing at byte 32, and loads 64 bytes, then the
first 32 bytes are written to bytes 32 through 63, and
the last 16 words are written to bytes 0 through 31.
Afterwards, the address counter would point to byte 32.
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相關PDF資料 |
PDF描述 |
|---|---|
| X24256S8-1.8 | 20V Single N-Channel HEXFET Power MOSFET in a D2-Pak package; A IRF1302S with Standard Packaging |
| X24256S8-2.5 | 60V Single N-Channel HEXFET Power MOSFET in a D2-Pak package; A IRFS3306PBF with Standard Packaging |
| X24256S8I | EEPROM |
| X24256S8I-1.8 | EEPROM |
| X24256S8I-2.5 | I2C Serial EEPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X24256S8-1.8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| X24256S8-2.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| X24256S8I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| X24256S8I-1.8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| X24256S8I-2.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
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