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  • 參數(shù)資料
    型號(hào): X20C04JMB-15
    英文描述: Nonvolatile Static RAM
    中文描述: 非易失性靜態(tài)RAM
    文件頁(yè)數(shù): 3/15頁(yè)
    文件大?。?/td> 67K
    代理商: X20C04JMB-15
    X20C04
    3
    Power-Up Recall
    Upon power-up (V
    CC
    ), the X20C04 performs an auto-
    matic array recall. When V
    CC
    minimum is reached, the
    recall is initiated, regardless of the state of
    CE
    ,
    OE
    ,
    WE
    and
    NE
    .
    Write Protection
    The X20C04 has five write protect features that are
    employed to protect the contents of both the nonvolatile
    memory and the RAM.
    V
    CC
    Sense—All functions are inhibited when V
    CC
    is
    3.5V.
    A RAM write is required before a Store Cycle is
    initiated.
    Write Inhibit—Holding either
    OE
    LOW,
    WE
    HIGH,
    CE
    HIGH, or
    NE
    HIGH during power-up and power-
    down will prevent an inadvertent store operation.
    Noise Protection—A combined
    WE
    ,
    NE
    ,
    OE
    and
    CE
    pulse of less than 20ns will not initiate a Store
    Cycle.
    Noise Protection—A combined
    WE
    ,
    NE
    ,
    OE
    and
    CE
    pulse of less than 20ns will not initiate a recall
    cycle.
    DEVICE OPERATION
    The
    CE
    ,
    OE
    ,
    WE
    and
    NE
    inputs control the X20C04
    operation. The X20C04 byte-wide NOVRAM uses a
    2-line control architecture to eliminate bus contention in
    a system environment. The I/O bus will be in a high
    impedance state when either
    OE
    or
    CE
    is HIGH, or
    when
    NE
    is LOW.
    RAM Operations
    RAM read and write operations are performed as they
    would be with any static RAM. A read operation requires
    CE
    and
    OE
    to be LOW with
    WE
    and
    NE
    HIGH. A write
    operation requires
    CE
    and
    WE
    to be LOW with
    NE
    HIGH. There is no limit to the number of read or write
    operations performed to the RAM portion of the X20C04.
    Nonvolatile Operations
    With
    NE
    LOW, recall operation is performed in the same
    manner as RAM read operation. A recall operation
    causes the entire contents of the E
    2
    PROM to be written
    into the RAM array. The time required for the operation
    to complete is 5
    μ
    s or less. A store operation causes the
    entire contents of the RAM array to be stored in the
    nonvolatile E
    2
    PROM. The time for the operation to
    complete is 5ms or less.
    SYMBOL TABLE
    WAVEFORM
    INPUTS
    OUTPUTS
    Must be
    steady
    Will be
    steady
    May change
    from LOW
    to HIGH
    Will change
    from LOW
    to HIGH
    May change
    from HIGH
    to LOW
    Will change
    from HIGH
    to LOW
    Don’t Care:
    Changes
    Allowed
    N/A
    Changing:
    State Not
    Known
    Center Line
    is High
    Impedance
    相關(guān)PDF資料
    PDF描述
    X20C04JMB-20 Nonvolatile Static RAM
    X20C04JMB-25 Nonvolatile Static RAM
    X20C04PI-15 Nonvolatile Static RAM
    X20C04PI-20 Nonvolatile Static RAM
    X20C04PI-25 Nonvolatile Static RAM
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    X20C04JMB-20 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Nonvolatile Static RAM
    X20C04JMB-25 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Nonvolatile Static RAM
    X20C04P 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Nonvolatile Static RAM
    X20C04P-15 功能描述:IC NVSRAM 4KBIT 150NS 28DIP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:150 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C,2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-VFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-DFN(2x3) 包裝:管件 產(chǎn)品目錄頁(yè)面:1445 (CN2011-ZH PDF)
    X20C04P-20 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Nonvolatile Static RAM