參數(shù)資料
        型號(hào): X1227V8IZ
        廠商: INTERSIL CORP
        元件分類: XO, clock
        英文描述: RTC Module With CPU Supervisor
        中文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO8
        封裝: ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-8
        文件頁數(shù): 3/28頁
        文件大小: 442K
        代理商: X1227V8IZ
        X1227
        REV 1.1.20 1/13/03
        Characteristics subject to change without notice.
        3 of 28
        www.xicor.com
        POWER CONTROL OPERATION
        The power control circuit accepts a V
        input. The power control circuit powers the device from
        V
        BACK
        when V
        CC
        < V
        BACK
        - 0.2V. It will switch back to
        power the device from V
        CC
        CC
        and a V
        BACK
        when V
        CC
        exceeds V
        BACK
        .
        Figure 2. Power Control
        REAL TIME CLOCK OPERATION
        The Real Time Clock (RTC) uses an external
        32.768kHz quartz crystal to maintain an accurate
        internal representation of the second, minute, hour,
        day, date, month, and year. The RTC has leap-year
        correction. The clock also corrects for months having
        fewer than 31 days and has a bit that controls 24 hour
        or AM/PM format. When the X1227 powers up after
        the loss of both V
        CC
        and V
        operate until at least one byte is written to the clock
        register.
        BACK
        , the clock will not
        Reading the Real Time Clock
        The RTC is read by initiating a Read command and
        specifying the address corresponding to the register of
        the Real Time Clock. The RTC Registers can then be
        read in a Sequential Read Mode. Since the clock runs
        continuously and a read takes a finite amount of time,
        there is the possibility that the clock could change during
        the course of a read operation. In this device, the time is
        latched by the read command (falling edge of the clock
        on the ACK bit prior to RTC data output) into a separate
        latch to avoid time changes during the read operation.
        The clock continues to run. Alarms occurring during a
        read are unaffected by the read operation.
        Writing to the Real Time Clock
        The time and date may be set by writing to the RTC
        registers. To avoid changing the current time by an
        uncompleted write operation, the current time value is
        loaded into a separate buffer at the falling edge of the
        clock on the ACK bit before the RTC data input bytes,
        the clock continues to run. The new serial input data
        replaces the values in the buffer. This new RTC value
        is loaded back into the RTC Register by a stop bit at
        the end of a valid write sequence. An invalid write
        operation aborts the time update procedure and the
        contents of the buffer are discarded. After a valid write
        operation the RTC will reflect the newly loaded data
        beginning with the next “one second” clock cycle after
        the stop bit is written. The RTC continues to update
        the time while an RTC register write is in progress and
        the RTC continues to run during any nonvolatile write
        sequences. A single byte may be written to the RTC
        without affecting the other bytes.
        Accuracy of the Real Time Clock
        The accuracy of the Real Time Clock depends on the
        frequency of the quartz crystal that is used as the time
        base for the RTC. Since the resonant frequency of a
        crystal is temperature dependent, the RTC perfor-
        mance will also be dependent upon temperature. The
        frequency deviation of the crystal is a fuction of the
        turnover temperature of the crystal from the crystal’s
        nominal frequency. For example, a >20ppm frequency
        deviation translates into an accuracy of >1 minute per
        month. These parameters are available from the
        crystal manufacturer. Xicor’s RTC family provides on-
        chip crystal compensation networks to adjust load-
        capacitance to tune oscillator frequency from +116
        ppm to –37 ppm when using a 12.5 pF load crystal.
        For more detail information see the Application
        section.
        CLOCK/CONTROL REGISTERS (CCR)
        The Control/Clock Registers are located in an area
        separate from the EEPROM array and are only
        accessible following a slave byte of “1101111x” and
        reads or writes to addresses [0000h:003Fh]. The
        clock/control memory map has memory addresses
        from 0000h to 003Fh. The defined addresses are
        described in the Table 1. Writing to and reading from
        the undefined addresses are not recommended.
        CCR access
        The contents of the CCR can be modified by perform-
        ing a byte or a page write operation directly to any
        address in the CCR. Prior to writing to the CCR
        (except the status register), however, the WEL and
        RWEL bits must be set using a two step process (See
        section “Writing to the Clock/Control Registers.”)
        The CCR is divided into 5 sections. These are:
        1. Alarm 0 (8 bytes; non-volatile)
        2. Alarm 1 (8 bytes; non-volatile)
        3. Control (4 bytes; non-volatile)
        4. Real Time Clock (8 bytes; volatile)
        5. Status (1 byte; volatile)
        V
        BACK
        In
        Voltage
        V
        CC
        On
        Off
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