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參數(shù)資料
| 型號： | WV3HG64M72EER534D7SG |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM MODULE, 0.5 ns, DMA244 |
| 封裝： | ROHS COMPLIANT, DIMM-244 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 197K |
| 代理商： | WV3HG64M72EER534D7SG |
WV3HG64M72EER-D7
October 2006
Rev. 3
PRELIMINARY
6
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
DDR2 ICC SPECIFICATIONS AND CONDITIONS
Includes DDR2 SDRAM components only; TA = 0°C, VCC = 1.9V
Symbol
Parameter
Condition
806
665
534
403
Unit
ICC0*
Operating one bank
active-precharge;
tCK = tCK(DD); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS# is HIGH
between valid commands; Address bus inputs are SWITCHING; Data bus
inputs are SWITCHING
TBD
1120
mA
ICC1*
Operating one
bank active-read-
precharge;
IOUT = 0mA; BL = 4; CL = CL(ICC); tCK = tCK(ICC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC);
CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs are
SWITCHING; Data bus inputs are SWITCHING; Data pattern is same as ICC4W.
TBD
1255
mA
ICC2P**
Precharge power-
down current;
All banks idle; tCK = tCK(ICC); CKE is LOW; Other control and address bus inputs
are STABLE; Data bus inputs are FLOATING
TBD
472
mA
ICC2Q**
Precharge quite
standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH; CS# is HIGH; Other control and
address bus inputs are STABLE; Data bus inputs are FLOATING
TBD
670
mA
ICC2N**
Precharge standby
current;
All banks idle; tCK = tCK(ICC); CKE is HIGH; CS# is HIGH; Other control and
address bus inputs are STABLE; Data bus inputs are SWITCHING
TBD
715
mA
ICC3P**
Active power-down
current;
All banks open; tCK = tCK(ICC), CKE is LOW; Other control
and address bus inputs are STABLE; Data bus inputs are
FLOATING
Fast PDN Exit
MRS(12) = 0
TBD
670
mA
Slow PDN Exit
MRS(12) = 1
TBD
508
mA
ICC3N**
Active standby
current;
All banks open; tCK = tCK(ICC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH,
CS# is HIGH between valid commands; Other control and address bus inputs
are SWITCHING; Data bus inputs are SWITCHING
TBD
850
mA
ICC4W*
Operating burst
write current;
All banks open; Continuous burst writes; BL = 4; CL = CL(ICC); AL = 0; tCK =
tCK(ICC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS# is HIGH between
valid commands; Address bus inputs are SWITCHING; Data bus inputs are
SWITCHING
TBD
1480
1390
mA
ICC4R*
Operating burst
read current;
All banks open; Continuous burst reads; TOUT = 0mA; BL = 4; CL = CL(ICC);
AL = 0; tCK = tCK(ICC); tRC = tRC(ICC); tRAS = tRAS MIN(ICC); CKE is HIGH, CS# is
HIGH between valid commands; Address bus inputs are SWITCHING; Data
pattern is same as ICC4W.
TBD
1525
1390
mA
ICC5**
Burst auto refresh
current;
tCK = tCK(ICC); Refresh command at every tRC(ICC) interval; CKE is HIGH; CS#
is HIGH between valid commands; Other control and address bus inputs are
SWITCHING; Data bus inputs are SWITCHING
TBD
1660
mA
ICC6**
Self refresh current;
CK and CK# at 0V; CKE < 0.2V; Other control and address
bus inputs are FLOATING; Data bus inputs are FLOATING
Normal
TBD
472
mA
ICC7*
Operating bank
interleave read
current;
All bank interleaving reads; IOUT = 0mA; BL = 4; CL = CL(ICC); AL = tRCD(ICC)
- 1*tCK(ICC); tCK = tCK(ICC); tRC = tRC(ICC); tRRD = tRRD MIN(ICC) = 1*tCK(ICC); CKE is
HIGH; CS# is HIGH between valid commands; Address bus inputs are STABLE
during DESELECTs; Data bus inputs are SWITCHING
TBD
2380
mA
Notes:
ICC specication is based on
SAMSUNG components. Other DRAM manufacturers specication may be different.
* Value calculated as one module rank in this operating condition, and all other module ranks in ICC2P ( CKE LOW) mode.
** Value calculated reects all module ranks in this operating condition.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WV3HG64M72EER665D6IMG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL |
| WV3HG64M72EER665D6ISG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL |
| WV3HG64M72EER665D6MG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL |
| WV3HG64M72EER665D6SG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED DIMM, w/PLL |
| WV3HG64M72EER665D7MG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL, Mini-DIMM |
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