參數(shù)資料
型號: WSF512K16-39H2IA
元件分類: 存儲器
英文描述: SPECIALTY MEMORY CIRCUIT, CHIP66
封裝: 1.385 INCH SQUARE, HERMETIC SEALED, CERAMIC, HIP-66
文件頁數(shù): 10/15頁
文件大小: 182K
代理商: WSF512K16-39H2IA
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
Parameter
Symbol
-35
-70
Unit
Read Cycle
Min Max
Min
Max
Read Cycle Time
tRC
35
70
ns
Address Access Time
tAA
35
70
ns
Output Hold from Address Change
tOH
05
ns
Chip Select Access Time
tACS
35
70
ns
Output Enable to Output Valid
tOE
25
35
ns
Chip Select to Output in Low Z
tCLZ1
410
ns
Output Enable to Output in Low Z
tOLZ1
05
ns
Chip Disable to Output in High Z
tCHZ1
15
25
ns
Output Disable to Output in High Z
tOHZ1
15
25
ns
1. This parameter is guaranteed by design but not tested.
SRAM AC CHARACTERISTICS
(VCC = 5.0V, TA = -55
°C to +125°C)
Parameter
Symbol
-35
-70
Unit
Write Cycle
Min Max
Write Cycle Time
tWC
35
70
ns
Chip Select to End of Write
tCW
25
60
ns
Address Valid to End of Write
tAW
25
60
ns
Data Valid to End of Write
tDW
20
30
ns
Write Pulse Width
tWP
25
50
ns
Address Setup Time
tAS
00
ns
Address Hold Time
tAH
05
ns
Output Active from End of Write
tOW1
05
ns
Write Enable to Output in High Z
tWHZ1
15
25
ns
Data Hold from Write Time
tDH
00
ns
1. This parameter is guaranteed by design but not tested.
SRAM AC CHARACTERISTICS
(VCC = 5.0V, TA = -55
°C to +125°C)
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75
.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
FIG. 3
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
I
Current Source
D.U.T.
C
= 50 pf
eff
I
OL
V
1.5V
(Bipolar Supply)
Z
Current Source
OH
WSF512K16-XXX
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