參數(shù)資料
型號(hào): WSE128K16-73H1MA
英文描述: 128Kx16 SRAM/EEPROM MODULE
中文描述: 128Kx16的SRAM / EEPROM的模塊
文件頁(yè)數(shù): 10/15頁(yè)
文件大小: 580K
代理商: WSE128K16-73H1MA
WSE128K16-XXX
PRELIMINARY
10
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March 2005
Rev. 3
EEPROM PAGE WRITE OPERATION
The WSE128K16-XXX has a page write operation
that allows one to 128 bytes of data to be written into
the device and consecutively loads during the internal
programming period. Successive bytes may be loaded
in the same manner after the first data byte has been
loaded. An internal timer begins a time out operation at
each write cycle. If another write cycle is completed within
150μs or less, a new time out period begins. Each write
cycle restarts the delay period. The write cycles can be
continued as long as the interval is less than the time out
period.
The usual procedure is to increment the least significant
address lines from A0 through A6 at each write cycle. In
this manner a page of up to 128 bytes can be loaded in
to the EEPROM in a burst mode before beginning the
relatively long interval programming cycle.
FIGURE 11 – EEPROM PAGE MODE WRITE WAVEFORMS
EEPROM PAGE WRITE CHARACTERISTICS
V
CC
= 5.0V, GND = 0V, -55°C ≤ T
A
≤ +125°C
Page Mode Write Characteristics
Parameter
Write Cycle Time, TYP = 6ms
Address Set-up Time
Address Hold Time (1)
Data Set-up Time
Data Hold Time
Write Pulse Width
Byte Load Cycle Time
Write Pulse Width High
NOTE:
1. Page address must remain valid for duration of write cycle.
Symbol
Min
Max
Unit
t
WC
t
AS
t
AH
t
DS
t
DH
t
WP
t
BLC
t
WPH
10
ms
ns
ns
ns
ns
ns
μs
ns
0
100
100
10
150
150
50
BYTE 0
BYTE 1
BYTE 2
BYTE 3
VALID
DATA
VALID
ADDRESS
t
WC
t
BLC
t
WPH
t
WP
BYTE 127
t
DS
t
DH
t
AS
t
AH
OE#
ECS#
1-2
EWE#
1-2
ADDRESS
EEPROM
DATA
After the 150μs time out is completed, the EEPROM
begins an internal write cycle. During this cycle the entire
page of bytes will be written at the same time. The internal
programming cycle is the same regardless of the number
of bytes accessed.
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