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參數(shù)資料
| 型號(hào)： | WSE128K16-42G2TMA |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, CQMA68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大小： | 635K |
| 代理商： | WSE128K16-42G2TMA |
WSE128K16-XXX
12
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
PRELIMINARY
White Electronic Designs Corp. reserves the right to change products or specications without notice.
March 2005
Rev. 3
EEPROM HARDWARE DATA
PROTECTION
These features protect against inadvertent writes to
the WSE128K16-XXX. These are included to improve
reliability during normal operation:
a) VCC power on delay
As VCC climbs past 3.8V typical the device will wait
5 msec typical before allowing write cycles.
b) VCC sense
While below 3.8V typical write cycles are inhibited.
c)
Write inhibiting
Holding OE# low and either ECS# or EWE# high
inhibits write cycles.
d) Noise lter
Pulses of <8ns (typ) on EWE# or ECS# will not
initiate a write cycle.
EEPROM SOFTWARE DATA
PROTECTION
A software write protection feature may be enabled
or disabled by the user. When shipped by WEDC, the
WSE128K16-XXX has the feature disabled. Write access
to the device is unrestricted.
To enable software write protection, the user writes three
access code bytes to three special internal locations.
Once write protection has been enabled, each write to the
EEPROM must use the same three byte write sequence
to permit writing. After setting software data protection,
any attempt to write to the device without the three-byte
command sequence will start the internal write timers. No
data will be written to the device, however, for the duration
of twc. The write protection feature can be disabled by
a six byte write sequence of specic data to specic
locations. Power transitions will not reset the software
write protection.
Each 128K byte block of the EEPROM has independent
write protection. One or more blocks may be enabled and
the rest disabled in any combination. The software write
protection guards against inadvertent writes during power
transitions, or unauthorized modication using a PROM
programmer.
FIGURE 13 – EEPROM SOFTWARE DATA
PROTECTION DISABLE ALGORITHM(1)
EXIT DATA(3)
PROTECT STATE
NOTES:
1. Data Format: ED7 - ED0 (Hex);
Address Format: A16 - A0 (Hex).
2. Write Protect state will be activated at end of write even if no other data
is loaded.
3. Write Protect state will be deactivated at end of write period even if no
other data is loaded.
4. 1 to 128 bytes of data may be loaded.
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 80
TO
ADDRESS 5555
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 20
TO
ADDRESS 5555
LOAD DATA XX
TO
ANY ADDRESS(4)
LOAD LAST BYTE
TO
LAST ADDRESS
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WSE128K16-42H1C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128KX16 SRAM/EEPROM MODULE |
| WSE128K16-42H1CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128KX16 SRAM/EEPROM MODULE |
| WSE128K16-42H1I | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx16 SRAM/EEPROM MODULE |
| WSE128K16-42H1IA | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128Kx16 SRAM/EEPROM MODULE |
| WSE128K16-42H1M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128KX16 SRAM/EEPROM MODULE |
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