參數(shù)資料
型號: WS57C256F-45T
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 32K X 8 UVPROM, 45 ns, CDIP28
封裝: 0.300 INCH, CERDIP-28
文件頁數(shù): 4/5頁
文件大小: 49K
代理商: WS57C256F-45T
SYMBOLS
PARAMETER
MIN
TYP
MAX
UNITS
tAS
Address Setup Time
2
s
tCOH
CE High to OE High
2
s
tOES
Output Enable Setup Time
2
s
tOS
Data Setup Time
2
s
tAH
Address Hold Time
0
s
tOH
Data Hold Time
2
s
tDF
Chip Disable to Output Float Delay
0
130
ns
tOE
Data Valid From Output Enable
130
ns
tVS/tCES
VPP Setup Time/CE Setup Time
2
s
tPW
PGM Pulse Width
100
200
s
tOCX
OE Low to CE "Don't Care"
2
s
WS57C256F
3-16
PROGRAMMING INFORMATION
DC CHARACTERISTICS (T
A = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
SYMBOLS
PARAMETER
MIN
MAX
UNITS
ILI
Input Leakage Current
–10
10
A
(VIN = VCC or Gnd)
IPP
VPP Supply Current During
60
mA
Programming Pulse (CE/ PGM = VIL)
ICC
VCC Supply Current (Note 8)
35
mA
VOL
Output Low Voltage During Verify
0.4
V
(IOL = 16 mA)
VOH
Output High Voltage During Verify
2.4
V
(IOH = –4 mA)
AC CHARACTERISTICS (T
A = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V)
PROGRAMMING WAVEFORM
ADDRESS STABLE
ADDRESSES
VPP
VCC
CE/PGM
DATA
tAS
tPW
tOS
tOH
tOE
tAH
tDF
tVS
tCES
tOES
tOCX
tCOH
DATA OUT
DATA IN STABLE
OE
VIH
VIL
VIH
VIL
VALID
HIGH Z
NOTE:
8. VCC must be applied either coincidentally or before VPP and removed either coincidentally or after VPP.
9. VPP must not be greater than 13 volts including overshoot. During CE = PGM = VIL, VPP must not be switched from 5 volts to
12.5 volts or vice-versa.
10. During power up the PGM pin must be brought high (
≥ V
IH) either coincident with or before power is applied to VPP.
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