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參數(shù)資料
| 型號(hào)： | WS512K32L-45G1TC |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 512K X 32 MULTI DEVICE SRAM MODULE, 45 ns, CQFP68 |
| 封裝： | 23.90 X 23.90 MM, 4.06 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68 |
| 文件頁(yè)數(shù)： | 8/13頁(yè) |
| 文件大?。?/td> | 485K |
| 代理商： | WS512K32L-45G1TC |
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White Electronic Designs Corporation Phoenix AZ (602) 437-1520
WS512K32-XXX
White Electronic Designs
AC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
FIG. 4 AC TEST CIRCUIT
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 .
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
Parameter
Symbol
-15*
-17
-20
-25
-35
-45
-55
Units
Write Cycle
Min Max Min Max
Min Max
Min Max Min
Max
Min
Max Min Max
Write Cycle Time
tWC
15
172025
35
4555n s
Chip Select to End of Write
tCW
13
151517
25
3550n s
Address Valid to End of Write
t AW
13
151517
25
3550n s
Data Valid to End of Write
tDW
10
11
1213
20
2525n s
Write Pulse Width
t WP
13
151517
25
3540n s
Address Setup Time
t AS
2
222
2
n s
Address Hold Time
t AH
0
000
0
5
n s
Output Active from End of Write tOW1
2
234
4
5
n s
Write Enable to Output in High Z
tWHZ1
8
9
11
1315
20
n s
Data Hold Time
tDH
0
000
0
n s
Parameter
Symbol
-15*
-17
-20
-25
-35
-45
-55
Units
Read Cycle
Min Max Min Max
Min Max
Min
Max Min Max
Min Max
Read Cycle Time
tRC
15
17
20
25
35
45
55
n s
Address Access Time
tAA
15
17
20
25
35
45
55
n s
Output Hold from Address Change tOH
0
0000
n s
Chip Select Access Time
tACS
15
17
20
25
35
45
55
n s
Output Enable to Output Valid
tOE
8
9
10
12
25
n s
Chip Select to Output in Low Z
tCLZ1
2
2444
n s
Output Enable to Output in Low Z tOLZ1
0
0000
n s
Chip Disable to Output in High Z tCHZ1
1212
12
1520
20
n s
Output Disable to Output in High Z tOHZ1
1212
12
1520
20
n s
*15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change
without notice.
1. This parameter is guaranteed by design but not tested.
*15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change
without notice.
1. This parameter is guaranteed by design but not tested.
2. The Address Setup Time of minimum 2ns is for the G2U, G1U and H1 packages. tAS minimum for the G4T package is 0ns.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WS512K32N-100HC | 制造商:Microsemi Corporation 功能描述:512K X 32 SRAM MODULE, 5V, 100NS, NO CONNECT, 66 PGA 1.185" - Bulk |
| WS512K32N-100HI | 制造商:Microsemi Corporation 功能描述:512K X 32 SRAM MODULE, 5V, 100NS, NO CONNECT, 66 PGA 1.185" - Bulk |
| WS512K32N-17H1C | 制造商:Microsemi Corporation 功能描述:512K X 32 SRAM MODULE, 5V, 17NS, NO CONNECT, 66 PGA 1.075" S - Bulk |
| WS512K32N-17H1CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM|512KX32|CMOS|PGA|66PIN|CERAMIC |
| WS512K32N-17H1I | 制造商:Microsemi Corporation 功能描述:512K X 32 SRAM MODULE, 5V, 17NS, NO CONNECT, 66 PGA 1.075" S - Bulk |
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