參數(shù)資料
型號(hào)： WS256K32L-25HI
元件分類： SRAM
英文描述： 256K X 32 MULTI DEVICE SRAM MODULE, 25 ns, CHIP66
封裝： CERAMIC, HIP-66
文件頁(yè)數(shù)： 4/7頁(yè)
文件大小： 173K
代理商： WS256K32L-25HI
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WS256K32-XXX
AC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, TA = -55
°C to +125°C)
Parameter
Symbol
-20
-25
-35
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
20
25
35
ns
Address Access Time
tAA
20
25
35
ns
Output Hold from Address Change
tOH
00
0
ns
Chip Select Access Time
tACS
20
25
35
ns
Output Enable to Output Valid
tOE
12
15
20
ns
Chip Select to Output in Low Z
tCLZ1
55
5
ns
Output Enable to Output in Low Z
tOLZ1
00
0
ns
Chip Disable to Output in High Z
tCHZ1
12
15
20
ns
Output Disable to Output in High Z
tOHZ1
12
15
20
ns
1. This parameter is guaranteed by design but not tested.
I
Current Source
D.U.T.
C
= 50 pf
eff
I
OL
V
≈ 1.5V
(Bipolar Supply)
Z
Current Source
OH
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75
.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
FIG. 3
AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
AC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, TA = -55
°C to +125°C)
Parameter
Symbol
-20
-25
-35
Units
Write Cycle
Min
Max
Min
Max
Min
Max
Write Cycle Time
tWC
20
25
35
ns
Chip Select to End of Write
tCW
17
20
25
ns
Address Valid to End of Write
tAW
17
20
25
ns
Data Valid to End of Write
tDW
12
15
20
ns
Write Pulse Width
tWP
17
20
25
ns
Address Setup Time
tAS
000
ns
Address Hold Time
tAH
222
ns
Output Active from End of Write
tOW1
000
ns
Write Enable to Output in High Z
tWHZ1
81015
ns
Data Hold Time
tDH
000
ns
1. This parameter is guaranteed by design but not tested.
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