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參數(shù)資料
| 型號(hào)： | WMS128K8L25DRMA |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 25 ns, CDSO32 |
| 封裝： | CERAMIC, SOJ-32 |
| 文件頁數(shù)： | 10/10頁 |
| 文件大?。?/td> | 133K |
| 代理商： | WMS128K8L25DRMA |
9
White Electronic Designs Corporation Phoenix, AZ (602) 437-1520
WMS128K8-XXX
Parameter
Symbol
Conditions
Units
Min
Typ
Max
Data Retention Supply Voltage
VDR
CS
≥ VCC -0.2V
2.0
5.5
V
Data Retention Current
ICCDR2
VCC = 2V
500
750
A
ICCDR3
VCC = 3V
1
2.9
mA
DATA RETENTION CHARACTERISTICS
(TA = -55
°C to +125°C)
LOW POWER VERSION ONLY
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
M = Military Screened
-55
°C to +125°C
I = Industrial
-40
°C to +85°C
C = Commercial
0
°C to +70°C
PACKAGE:
C = 32 Pin Ceramic .600" DIP (Package 300)
CL = 32 Pin Rectangular Ceramic Leadless Chip Carrier (Package 601)
DE = 32 Lead Ceramic SOJ (Package 101) Evolutionary
DJ = 36 Lead Ceramic SOJ (Package 100)
DR = 32 Lead Ceramic SOJ (Package 101) Revolutionary
F = 36 Lead Ceramic Flat Pack (Package 226)
FE = 32 Lead Ceramic Flat Pack (Package 220)
ACCESS TIME (ns)
IMPROVEMENT MARK
L = Low Power for 2V Data Retention
ORGANIZATION, 128K x 8
SRAM
MONOLITHIC
WHITE ELECTRONIC DESIGNS CORP.
ORDERING INFORMATION
W M S 128K8 X - XXX X X X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| WMS128K8L35CMA | 128K X 8 STANDARD SRAM, 35 ns, CDIP32 |
| WMS128K8L35DJC | 128K X 8 STANDARD SRAM, 35 ns, CDSO36 |
| WMS128K8L45DRCA | 128K X 8 STANDARD SRAM, 45 ns, CDSO32 |
| WMS128K8L45DRIA | 128K X 8 STANDARD SRAM, 45 ns, CDSO32 |
| WMS128K8L55DRM | 128K X 8 STANDARD SRAM, 55 ns, CDSO32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WMS128K8L-25DRMA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-25DRME | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-25FC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM|128KX8|CMOS|FP|36PIN|CERAMIC |
| WMS128K8L-25FCA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| WMS128K8L-25FCE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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