參數(shù)資料
型號： WM8756EFT
廠商： Wolfson Microelectronics
英文描述： 192KHZ SIX CHANNEL SACD COMPATIBLE AUDIO DAC
中文描述： 192kHz的六聲道SACD的兼容的音頻數(shù)模轉(zhuǎn)換器
文件頁數(shù)： 15/39頁
文件大?。?/td> 330K
代理商： WM8756EFT
WM8756
Advance Information
AI Rev 1.3 October 2001
15
I
2
S MODE
In I
2
S mode, the MSB is sampled on the second rising edge of BCKIN following a LRCIN transition.
LRCIN is low during the left samples and high during the right samples.
LEFT CHANNEL
RIGHT CHANNEL
LRCIN
BCKIN
DIN0/1/2
1/fs
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
LSB
MSB
1 BCKIN
1 BCKIN
Figure 8 I
2
S Mode Timing Diagram
DSP EARLY MODE
In DSP early mode, the first bit is sampled on the BCKIN edge following the one which detects a low to
high transition on LRCIN.
1 BCKIN
LRCIN
BCKIN
DIN0
Input Word Length (IWL)
1/fs
CHANNEL 0
LEFT
n
2
1
n-1
LSB
MSB
n
2
1
n-1
CHANNEL 0
RIGHT
2
1
CHANNEL 1
LEFT
n
n-1
CHANNEL 2
RIGHT
NO VALID DATA
1 BCKIN
Figure 9 DSP Early Mode Timing Diagram
DSP LATE MODE
In DSP late mode, the first bit is sampled on the BCKIN edge which detects a low to high transition on
LRCIN.
LRCIN
BCKIN
DIN0
Input Word Length (IWL)
1/fs
CHANNEL 0
LEFT
n
2
1
n-1
LSB
MSB
n
2
1
n-1
CHANNEL 0
RIGHT
2
1
CHANNEL 1
LEFT
n
n-1
CHANNEL 2
RIGHT
NO VALID DATA
1
Figure 10 DSP Late Mode Timing Diagram
In both early and late DSP modes, DAC0 left is always sent first, followed immediately by data words for
the other 5 channels. No BCKIN edges are allowed between the data words. The word order is DAC0 left,
DAC0 right, DAC1 left, DAC1 right, DAC2 left, DAC2 right.
相關(guān)PDF資料
PDF描述
WM8756 192KHZ SIX CHANNEL SACD COMPATIBLE AUDIO DAC
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