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參數(shù)資料
| 型號： | WM2629 |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | Octal 8-bit, Serial Input, Voltage Output DAC with Power Down |
| 中文描述： | 八進(jìn)制8位，串行輸入，電壓與掉電輸出DAC |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 119K |
| 代理商： | WM2629 |
Production Data
WM2629
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 April 2001
11
DAC A TO H CODE REGISTERS
Addresses 0 to 7 are the DAC registers. Bits D11 (MSB) to D4 (LSB) from these registers are
transferred to the respective DAC when the LOADB input (pin 18) is low. Bits D3 to D1 are unused
and must be set to 0. For instantaneous updating, LOADB can be held low permanently.
CONTROL REGISTER 0
Control register 0 (address 8) is used to select functions that apply to the whole IC, such as Power
Down and Data Input Format.
BIT
D11
X
X
D10
X
X
D9
X
X
D8
X
X
D7
X
X
D6
X
X
D5
X
X
D4
PD
0
D3
DO
0
D2
X
0
D1
X
0
D0
IM
0
Function
Default
Table 5 Control Register 0 Map
BIT
PD
DO
IM
X
DESCRIPTION
Full device Power Down
DOUT Enable
Input Mode
Reserved
0
1
Normal
Disabled
Straight Binary
Power Down
Enabled
Two
’
s Complement
Table 6 Control Register 0 Functionality
CONTROL REGISTER 1
Control register 1 (address 9) is used to power down individual pairs of DACs and select their settling
time. Powering down a pair of DACs disables their amplifiers and reduces the power consumption of
the device. The settling time in fast mode is typically 1
μ
s. In slow mode, the settling time is typically
3
μ
s and power consumption is reduced.
BIT
D11
X
X
D10
X
X
D9
X
X
D8
X
X
D7
P
GH
0
D6
P
EF
0
D5
P
CD
0
D4
P
AB
0
D3
S
GH
0
D2
S
EF
0
D1
S
CD
0
D0
S
AB
0
Function
Default
Table 7 Control Register 1 Map
BIT
P
XY
S
XY
DESCRIPTION
Power Down DACs X and Y
Speed Setting for DACs X and Y
0
1
Normal
Slow
Power Down
Fast
Table 8 Control Register 1 Functionality
DAC PRESET REGISTER
The Preset register (address 10) makes it possible to update all eight DACs at the same time. The
value stored in this register becomes the digital input to all the DACs when the asynchronous PREB
input (pin 5) is driven low. If no data has previously been written to the preset register, all DACs are
set to zero scale.
TWO-CHANNEL REGISTERS
The two-channel registers (addresses 12 to 15) provide a
‘
differential output
’
function where writing
data to one DAC will automatically write the complement to the other DAC in the pair. For example,
writing a value of 255 to address 12 will set DAC A to full scale and DAC B to zero scale.
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