參數(shù)資料
型號(hào): WM2618CD
廠(chǎng)商: Wolfson Microelectronics
英文描述: Dual 12-Bit Serial Input Voltage Output DAC
中文描述: 雙12位串行輸入電壓輸出DAC
文件頁(yè)數(shù): 8/10頁(yè)
文件大小: 125K
代理商: WM2618CD
WM2618
Production Data
WOLFSON MICROELECTRONICS LTD
PD
Rev 1.1 October 2000
8
SERIAL
INTERFACE
REGISTER
D12 = X
D15 = HIGH
DOUBLE
BUFFER LATCH
LATCH B
TO DAC B
LATCH A
TO DAC A
Figure 2 Latch A Write, Latch B Update
LATCH B AND DOUBLE BUFFER WRITE (D15 = LOW, D12 = LOW)
The SIR data are written to both latch B and the double buffer. Latch A is unaffected.
SERIAL
INTERFACE
REGISTER
D12 = LOW
D15 = LOW
DOUBLE
BUFFER LATCH
LATCH B
TO DAC B
LATCH A
TO DAC A
Figure 3 Latch B and Double Buffer Write
DOUBLE BUFFER ONLY WRITE (D15 = LOW, D12 = HIGH)
The SIR data are written to the double buffer only. Latch A and B contents are unaffected.
SERIAL
INTERFACE
REGISTER
D12 = HIGH
D15 = LOW
DOUBLE
BUFFER
LATCH B
TO DAC B
LATCH A
TO DAC A
Figure 4 Double Buffer Only Write
OPERATIONAL EXAMPLES
1. changing the latch A data from zero to full code
Assuming that latch A starts at zero code (e.g., after power up), the latch can be filled with 1s
by writing (bit D15 on the left, D0 on the right)
1X0X 1111 1111 1111
to the serial interface. Bit D14 can be zero to select slow mode or one to select fast mode.
The other X can be zero or one (don
t care).
The latch B contents and DAC B output are not changed by this write unless the double
buffer contents are different from the latch B contents. This can only be true if the last write
was a double buffer-only write.
2. changing the latch B data from zero to full code
Assuming that latch B starts at zero code (e.g., after power up), the latch can be filled with 1s
by writing (bit D15 on the left, D0 on the right).
0X00 1111 1111 1111
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