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| 型號： | WHITEPAPER |
| 英文描述： | White Paper - The Mobile AMD Athlon XP Processor |
| 中文描述： | 白皮書-移動AMD Athlon XP處理器 |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 102K |
| 代理商： | WHITEPAPER |
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The Mobile AMD Athlon XP-M Processor
March 2003
can actually be reduced by forcing frequency improvements at the expense of IPC
improvements.
This key point can be illustrated in PC office applications which tend to be
branch-code intensive resulting in lower performance for deeper pipelines that must
be flushed with a much greater performance penalty. As reaffirmed in the Desktop
Performance and Optimization for Intel Pentium 4 Processor paper
(http://developer.intel.com/design/pentium4/papers/249438.htm), “Integer and
basic office productivity applications, such as Word and spreadsheet processing, tend
to have many branches in the code, thus reducing overall IPC capabilities. As a
result, the associated branch penalties and performance on these applications does
not generally scale as well with frequency and are more resistant to improvements in
micro-architectural means, such as deeper pipelines.”
The mobile AMD Athlon XP-M processor with QuantiSpeed architecture
implemented on 0.13-micron process technology continues to exhibit the AMD Athlon
processor family’s balanced combination of improving clock frequency without
compromising the amount of work done per clock cycle and therefore the IPC. The
end result is a processor design that produces a high IPC as well as high operating
frequencies, the optimum combination to deliver one of the highest levels of PC
performance in real-world application environments.
QuantiSpeed architecture consists of four key differentiating features that
enhance the application performance of the mobile AMD Athlon XP-M processor:
1) Nine-issue, superscalar, fully pipelined microarchitecture
2) Superscalar, fully pipelined floating point unit (FPU)
3) Hardware data prefetch
4) Enhanced Translation Look-aside Buffers (TLBs)
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