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參數(shù)資料
| 型號： | WF128K64-XG4WX5 |
| 英文描述： | 128Kx64 5V Flash Module(128Kx64,5V閃速存儲器模塊) |
| 中文描述： | 128Kx64 5V的閃存模塊（128Kx64，5V的閃速存儲器模塊） |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 186K |
| 代理商： | WF128K64-XG4WX5 |
White Microelectronics Phoenix, AZ (602) 437-1520
7
F
1
128Kx64 5V FLASH MODULE
PRELIMINARY*
FEATURES
I
Access Times of 60, 70, 90, 120, 150ns
I
Packaging
116 lead, 40mm square, Hermetic CQFP (Package 504)
I
Sector Architecture
8 equal size sectors of 16KBytes each
Any combination of sectors can be concurrently erased.
Also supports full chip erase
I
100,000 Erase/Program Cycles Minimum (0
°
C to 70
°
C)
I
Data Retention, 10 Year Minimum at 125
°
C
I
Organized as 128Kx64, user configurable as 256Kx32,
512Kx16 or 1Mx8.
WF128K64-XG4WX5
I
Commercial, Industrial and Military Temperature Ranges
I
5 Volt Programming; 5V (
±
10%) Supply
I
Low Power CMOS, 8mA Standby Typical
I
Hardware and Software Write Protection
I
TTL Compatible Inputs and Outputs
I
Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
I
Weight
WF128K64-XG4WX5 - 20 grams typical
* This data sheet describes a product under development and is subject
to change without notice.
Note: Programming information available upon request.
FIG. 1
PIN CONFIGURATION FOR WF128K64-XG4WX5
1
128K x 8
8
I/O
0-7
CS
1
2
128K x 8
8
I/O
8-15
CS
2
8
I/O...
CS
x
8
128K x 8
8
I/O
56-63
CS
8
A
0-16
WE
1
WE
2
WE
x
WE
8
......
BLOCK DIAGRAM
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
1
1
1
1
1
1
9
8
7
6
5
4
3
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
GND
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I
2
I
3
I
3
V
C
W
3
C
3
N
N
N
N
A
1
A
1
W
4
C
4
O
C
5
W
5
A
1
A
1
A
1
A
1
A
1
N
C
6
W
6
V
C
I
3
I
3
I
3
I/O
60
I/O
59
I/O
58
I/O
57
I/O
56
GND
I/O
55
I/O
54
I/O
53
I/O
52
I/O
51
I/O
50
I/O
49
I/O
48
GND
I/O
47
I/O
46
I/O
45
I/O
44
I/O
43
I/O
42
I/O
41
I/O
40
GND
I/O
39
I/O
38
I/O
37
I/O
36
I/O
35
I
2
I
1
I
0
V
C
W
2
C
2
N
A
0
A
1
A
2
A
3
A
4
W
1
C
1
N
C
8
W
8
A
5
A
6
A
7
A
8
A
9
N
C
7
W
7
V
C
I
6
I
6
I
6
4
4
4
4
4
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
7
7
7
7
TOP VIEW
I/O
0-63
Data Inputs/Outputs
A
0-16
Address Inputs
WE
1-8
Write Enables
CS
1-8
Chip Selects
OE
Output Enable
V
CC
Power Supply
GND
Ground
NC
Not Connected
PIN DESCRIPTION
September 1998
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