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參數(shù)資料
| 型號： | WF128K32-70G2UQ5 |
| 元件分類： | PROM |
| 英文描述： | 128K X 32 FLASH 5V PROM MODULE, 70 ns, CQFP68 |
| 封裝： | 22.40 MM, CERAMIC, LQFP-68 |
| 文件頁數(shù)： | 13/15頁 |
| 文件大?。?/td> | 256K |
| 代理商： | WF128K32-70G2UQ5 |
7
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WF128K32-XXX5
FIG. 6
WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED
NOTES:
1. PA is the address of the memory location
to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the output of the complement of the
data written to the device (for each chip).
4. DOUT is the output of the data written to
the device.
5. Figure indicates last two bus cycles of four bus
cycle sequence.
Addresses
CS
OE
WE
Data
5.0
V
5555H
PA
tWC
tCS
PD
D
7
D
OUT
tAH
tWPH
tDH
tDS
Data
Polling
tAS
tRC
tWP
A0H
tOE
tDF
tOH
tCE
tGHWL
tWHWH1
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