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參數(shù)資料
| 型號： | WED3DG72126V10D2 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 SYNCHRONOUS DRAM MODULE, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大小： | 148K |
| 代理商： | WED3DG72126V10D2 |
Sept. 2002
Rev. 0
WED3DG72126V-D2
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
White Electronic Designs Corp. reserves the right to change products or specications without notice.
OPERATING CURRENT CHARACTERISTICS
(VCC = 3.3V, 0°C ≤ TA ≤ 70°C)
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VCCQ/VSSQ)
Parameters
Symbol
Conditions
Versions
Units
Note
133
100
Operating Current
(One bank active)
ICC1
Burst Length = 1
tRC ≥ tRC(min)
IOL = 0mA
2,250
2,070
mA
1
Precharge Standby Current
in Power Down Mode
ICC2P
CKE ≤ VIL(max), tCC = 10ns
110
mA
ICC2PS
CKE & CK ≤ VIL(max), tCC = ∞
90
mA
Precharge Standby Current
in Non-Power Down Mode
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
Input signals are charged one time during 20
540
mA
ICC2NS
CKE ≥ VIH(min), CK ≤ VIL(max), tCC= ∞
Input signals are stable
180
mA
Active standby current in power-
down mode
ICC3P
CKE ≥ VIL(max), tCC = 10ns
180
mA
ICC3PS
CKE & CK ≤ VIL(max), tCC = ∞
145
Active standby in current non
power-down mode
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are charged one time during 20ns
900
mA
ICC3NS
CKE ≥ VIH(min), CK ≤ VIL(max), tCC = ∞
input signals are stable
630
mA
Operating current (Burst mode)
ICC4
Io = mA
Page burst
4 Banks activated
tCCD = 2CK
2,250
1,980
mA
1
Refresh current
ICC5
tRC ≥ tRC(min)
3,420
mA
2
Self refresh current
ICC6
CKE ≤ 0.2V
125
mA
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| WED3DG72126V75D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1 GB-128Mx72, SDRAM UNBUFFERED |
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