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參數(shù)資料
| 型號(hào)： | WED3DG6364V7D2 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 64M X 64 SYNCHRONOUS DRAM MODULE, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 459K |
| 代理商： | WED3DG6364V7D2 |
4
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Aug. 2002 Rev. 0
ECO #15455
WED3DG6464V-D2
OPERATING CURRENT CHARACTERISTICS
(VCC = 3.3V, TA = 0°C to +70°C)
Notes: 1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS (VIH/VIL = VDDQ/VssQ)
Version
Parameter
Symbol
Conditions
133
100
Units Note
Operating Current
ICC1
Burst Length = 1
1200
1040
mA
1
(One bank active)
tRC tRC(min)
IOL = 0mA
Precharge Standby Current
ICC2P
CKE VIL(max), tCC = 10ns
40
mA
in Power Down Mode
ICC2PS
CKE & CLK VIL(max), tCC =
40
Icc2N
CKE VIH(min), CS VIH(min), tcc = 10ns
Precharge Standby Current
Input signals are charged one time during 20
320
in Non-Power Down Mode
Icc2NS
CKE VIH(min), CLK VIL(max), tcc =
mA
Input signals are stable
160
Active standby current in
ICC3P
CKE VIL(max), tCC = 10ns
100
mA
power-down mode
ICC3PS
CKE & CLK VIL(max), tcc =
100
ICC3N
CKE VIH(min), CS VIH(min), tcc = 10ns
Active standby current in
Input signals are changed one time during 20ns
480
mA
non power-down mode
ICC3NS
CKE VIH(min), CLK VIL(max), tcc =
input signals are stable
400
mA
Io = mA
Operating current (Burst mode)
ICC4
Page burst
1280
1120
mA
1
4 Banks activated
tCCD = 2CLK
Refresh current
ICC5
tRC tRC(min)
2000
1760
mA
2
Self refresh current
ICC6
CKE 0.2V
50
mA
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| WED3DG6365V10D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx64, SDRAM UNBUFFERED |
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| WED3DG6365V7D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx64, SDRAM UNBUFFERED |
| WED3DG6366V10D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB -64Mx64, SDRAM UNBUFFERED |
| WED3DG6366V75D2 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB -64Mx64, SDRAM UNBUFFERED |
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