參數(shù)資料
型號： W9966TF
文件頁數(shù)： 22/44頁
文件大?。?/td> 278K
代理商： W9966TF
Prel i m nary -22- November 1997
W9966CF/TF
Video Camera Interface Controller with Compression
8.1CCD Interface Register Descriptions
Software Reset Control Register (CR00)
Read/Write
Default : XXXXXXX1B
Index : 00H
7
6
5
4
3
2
1
0
Reserved
EF_RST SD_RST
Bits 7-2
Reserved
Bit 1
ECP FIFO Reset
0 = Normal operation
1 = Reset the ECP fifo
Bit 0
SD Bus Reset
0 = Normal operation
1 = Reset the SD bus (tri-stated)
CCD/DSP Pixel Data Capture Control Register (CR01)
Read/Write
Default : 00H
Index : 01H
7
6
5
4
3
2
1
0
VCE
HOLD
SKP
VSP
HSP
CM
SWAP
Bit 7
CCD/DSP Pixel Data Capture Enable
0 = Disable
1 = Enable
Bits 6-5
Capture Hold Control
00 = Continuously capture pixel data (non-interlaced mode)
01 = Continuously capture pixel data (interlaced mode)
10 = Capture and hold after one frame/field (non-interlaced/interlaced mode)
11 = Capture and hold after one frame (interlaced mode)
Bit 4
Skip Frame or Field
0 = Capture all received frames or fields of pixel data
1 = Capture every other received frames or fields of pixel data
Bit 3
VS Input Pin Polarity
0 = Active low
1 = Active high
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