參數(shù)資料
型號(hào): W9864G6DB-7
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 1M x 4 BANKS x 16 BITS SDRAM
中文描述: 4M X 16 SYNCHRONOUS DRAM, 5.5 ns, PBGA60
封裝: 0.65 MM PITCH, BGA-60
文件頁數(shù): 37/48頁
文件大?。?/td> 1283K
代理商: W9864G6DB-7
W986432DH
Publication Release Date: September 4, 2001
- 37 -
Revision A3
Operating Timing Example, continued
Power Down Mode
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
(CLK = 100 MHz)
RAa
CAa
RAa
CAx
RAa
RAa
ax0
ax1
ax2
ax3
t
SB
t
CKS
t
CKS
t
CKS
t
SB
t
CKS
Active Standby
Power Down mode
Precharge Standby
Power Down mode
Active
NOP
Precharge
NOPActive
Note: The PowerDown Mode is entered by asserting CKE "low".
All Input/Output buffers (except CKE buffers) are turned off in the PowerDown mode.
When CKE goes high, command input must be No operation at next CLK rising edge.
CLK
DQ
CKE
DQM
A0-A9
A10
BS
WE
CAS
RAS
CS
Read
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