參數(shù)資料
型號(hào): W986432DH-6
英文描述: SDRAM|4X512KX32|CMOS|TSSOP|86PIN|PLASTIC
中文描述: 內(nèi)存| 4X512KX32 |的CMOS | TSSOP封裝| 86PIN |塑料
文件頁數(shù): 25/48頁
文件大小: 1283K
代理商: W986432DH-6
W986432DH
Publication Release Date: September 4, 2001
- 25 -
Revision A3
Operating Timing Example, continued
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto Pre-charge)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
(CLK = 100 MHz)
CLK
CKE
DQM
A0-A9
A10
BS1
WE
CAS
RAS
CS
BS0
t
RC
t
RC
t
RC
t
RAS
t
RP
t
RAS
t
RP
t
RP
t
RAS
t
RAS
t
RCD
t
RCD
t
RCD
t
AC
t
AC
t
AC
t
AC
t
RRD
t
RRD
t
RRD
t
RRD
Active
Read
Active
Read
Active
Active
Active
Read
Read
t
RC
RAa
RAc
RBd
RAe
DQ
aw0
aw1
aw2
aw3
bx0
bx1
bx2
bx3
cy0
cy1
cy2
cy3
dz0
* AP is the internal precharge start timing
Bank #0
Idle
Bank #1
Bank #2
Bank #3
AP*
AP*
RAa
CAw
RBb
CBx
RAc
CAy
RBd
RAe
CBz
RBb
AP*
t
RCD
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