參數(shù)資料
型號(hào): W925C240
英文描述: Telephone Controller
中文描述: 電話控制器
文件頁(yè)數(shù): 47/66頁(yè)
文件大?。?/td> 930K
代理商: W925C240
W925E/C240
8-bit CID Microcontroller
Revision : A6
-47-
Release Date : 2002/7/2
6.15
Calling Identity Delivery (CID)
W925E/C240 provides type I and type II of CID system. Type I is on-hook calling with CID
message and type II is off-hook call on waiting. The CID function includes FSK decoder, dual
tone alert signal detector, ring detector and DTMF receiver. The FSK demodulation function can
demodulate Bell 202 and ITU-T V.23 Frequency Shift keying (FSK) with 1200 baud rate. The
Tone Alert Signal detect function can detect dual tones of Bellcore Customer Premises
Equipment(CPE) Tone Alerting Signal(CAS) and BT Idle State and Loop State Tone Alert Signal.
The line reversal for BT, ring burst for CCA or ring signal for Bellcore can be detected by ring
detector. It is compatible with Bellcore TR-NWT-000030 & ST-TSV-002476, British Telecom(BT)
SIN227, U.K. Cable Communications Association(CCA) specification. The DTMF receiver can be
programmed as DTMF decoder to decode 16 DTMF signals or tone detector to detect the signal
which frequency is in DTMF band. The tone detector can be an auxiliary detector to improve the
performance of detecting tone alerting signal(CAS), said as talk down-off, in type II system.
The FSK decoder, alert tone detector and DTMF receiver can be enable/disable individually by
the bits of FSKE, CASE and DTMFE in FSK DATA REGISTER(FSKDR). CIDE is the global
control bit to enable/disable FSK decoder, alert tone detector and DTMF receiver. However, the
ring detector is always active.
FSK Bandpass
Filter
DeFSK
FSK
Data Output
Interface
FSK Carrier
Detector
Guard
Time
Circuit
Bias Voltage
Generator
To internal
circuit
Clock Driver
To internal
circuit
VREF
FCD
FDR
FD7-FD0
CIDE,RST
Fm
RNGDI
RNGRC
VADD
VASS
FSKE
FSK Demodulation Circuit
Dual Tone Alert Signal Detection Circuit
Ring Detector
Interrupt
Generator
INP1
INN1
GCFB1
ALGO
High Tone
Bandpass
Filter
Low Tone
Bandpass
Filter
Guard
Time
Timer
High Tone
Detector
Low Tone
Detector
Decode
DTMFD
DD3-DD0
CASE
DTMFE
ESt
DTMFPT/DTMFAT
FDATA
INP2
INN2
+
-
Anti-alias
Filter
GCFB2
Input Pre-processor
PGAF
CASPT/CASAT
RNG
CAP
+
-
Anti-alias
Filter
Input Pre-processor
PGAF
<7:4>
PGD
<7:4>
PGD
PHAD<3:0>
PHFL<7:4>
High Tone
Bandpass
Filter
Low Tone
Bandpass
Filter
High Tone
Detector
Low Tone
Detector
PHAD<7:4>
PHFL<3:0>
CIDGD
CIDGA
PS: The signals noted in italic and underline type are CID pins on the chip.
Figure 6-14 The CID Block Diagram
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