
Preliminary W91310N SERIES
Publication Release Date: January 2001
- 3 -
Revision A1
PIN DESCRIPTION
SYMBOL
Column-
Row Inputs
PIN
DIP
1
4
&
15
18
(17-20)/
(AN)
7, 8
PIN
SSOP
I/O
I
FUNCTION
1
4
&
17
20
The keyboard input may be from either the standard 4
×
4 keyboard or an inexpensive single contact (form A)
keyboard. Electronic input from a
μ
C can also be used. A
valid key entry is defined as a single row being
connected to a single column.
I, O A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonator.
O
The T/P MUTE is a conventional CMOS N-channel open
drain output. The output transistor is switched on during
pulse and tone mode dialing sequence and flash break.
Otherwise, it is switched off.
I
Pulling mode pin to V
SS
places the dialer in tone mode.
Pulling mode pin to V
DD
places the dialer in pulse mode
(10 ppS). Leaving mode pin floating places the dialer in
pulse mode (20 ppS).
I
Hook switch input. HKS = 1: On-hook state. Chip in
sleeping mode, no operation. HKS = 0: Off-hook state.
Chip enabled for normal operation. The HKS pin is
pulled to V
DD
by an internal resistor.
O
N-channel open drain dialing pulse output (Figure 1).
Flash key will cause DP to go active in both pulse mode
and tone mode.
XT, XT
8, 9
T/P MUTE
9
10
MODE
13
15(AN)
14
HKS
10
12(AN)
11
DP
11
13(AN)
12
DTMF
12
14(AN)
13
O
In pulse mode, remains in low state at all times. In tone
mode, outputs a dual or single tone. Detailed timing
diagram for tone mode is shown in Figure 2(a, b).
OUTPUT FREQUENCY
Specified
Actual
Error %
+0.28
-0.52
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
-0.47
+0.74
+0.57
-0.30
-0.34
R1
V
DD
, V
SS
14, 6
16, 6 (AN)
16, -7
I
Power input pins.
B/M
5
5
I
The break make ratio is 60:40 if B/M = 1 and is 66.6:33.3
if B/M = 0. This pin has no function in DTMF mode.