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參數(shù)資料
| 型號： | W83L519D |
| 英文描述： | Peripheral Miscellaneous |
| 中文描述： | 周邊雜項 |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 374K |
| 代理商： | W83L519D |
W83L519D
PRELIMINARY
The trademarks and intellectual property rights of Memory Stick belong to SONY Corporation
Publication Release Date: Feb. 2002
The trademarks and intellectual property rights of SD belong to SD GROUP
All trademarks and brand names belong to their respective owners
Revision 0.50
16
CR60, CR61 (Both default 00h)
Base address configuration registers: programmable at addresses from 0100h to 0FF8h on 4-byte
boundary. Base address + 0 and base address + 1 are for GPIO1 as direction register and data
register respectively while base address + 2 and base address + 3 are for GPIO2 as direction
register and data register respectively.
CRF0 (GP10 ~ GP17 direction register. Default FFh)
When set to "1", respective GPIO port is programmed as an input port. When set to a "0",
respective GPIO port is programmed as an output port.
CRF1 (GP10 ~ GP17 data register. Default 00h)
If a port is programmed to be an output port, its respective bit can be read/written and output to
respective pin. If a port is programmed to be an input port, its respective bit reflects what is on
respective pin.
CRF2 (GP10 ~ GP17 inversion register. Default 00h)
When set to "1", respective incoming/outgoing port value is inverted. When set to "0",
respective incoming/outgoing port value is the same as in data register.
CRF3 (GP20 ~ GP27 direction register. Default FFh)
When set to "1", respective GPIO port is programmed as an input port. When set to a "0",
respective GPIO port is programmed as an output port.
CRF4 (GP20 ~ GP27 data register. Default 00h)
If a port is programmed to be an output port, its respective bit can be read/written and output to
respective pin. If a port is programmed to be an input port, its respective bit reflects what is on
respective pin.
CRF5 (GP20 ~ GP27 inversion register. Default 00h)
When set to "1", respective incoming/outgoing port value is inverted. When set to "0",
respective incoming/outgoing port value is the same as in data register.
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