
W83910F
PRELIMINARY
Publication Release Date: Feb. 2001
-5 -
Preliminary Revision 0.46
3. PIN DESCRIPTION
I/O8t
I/O12t
I/O12tp3
I/OD12t
I/O24t
OUT12t
OUT12tp3 - 3.3V TTL level output pin with 12 mA source-sink capability
OD12
- Open-drain output pin with 12 mA sink capability
OD24
- Open-drain output pin with 24 mA sink capability
INcs
- CMOS level Schmitt-trigger input pin
INt
- TTL level input pin
INtd
- TTL level input pin with internal pull down resistor
INts
- TTL level Schmitt-trigger input pin
INtsp3
- 3.3V TTL level Schmitt-trigger input pin
A
IN
- Analog input
- TTL level bi-directional pin with 8 mA source-sink capability
- TTL level bi-directional pin with 12 mA source-sink capability
- 3.3V TTL level bi-directional pin with 12 mA source-sink capability
- TTL level bi-directional pin open drain output with 12 mA sink capability
- TTL level bi-directional pin with 24 mA source-sink capability
- output pin with 12 mA source-sink capability
A
OUT
- Analog output
Pin No.
Pin name
Type
Description
LPC Interface .
5
PCIRST#
IN
tsp3
LPC interface reset signal (PCIRST#)
6
LFRAME#
IN
tsp3
Indicates start of a new cycle, termination of broken cycle.
10,9,8,7
LAD[3:0]
I/O
12tp3
Multiplexed Command, Address, and Data bus
11
PCICLK
IN
tsp3
33M Hz clock input for LPC bus
12
SERIRQ
I/OD
12t
This signal implements the serial interrupt protocol
System I2C Interface.
124
P1SMBCLK#
I/OD
12st
Private I
2
C
TM
bus 1 clock
125
P1SMBDATA#
I/OD
12st
Private I
2
C
TM
bus 1 data.
128
P2SMBCLK#
I/OD
12st
Private I
2
C
TM
bus 2 clock
1
P2SMBDATA#
I/OD
12st
Private I
2
C
TM
bus 2 data.
IPMB Interface.
42
IPMBCLK#
I/OD
20st
IPMB clock
43
IPMBDATA#
I/OD
20st
IPMB data
RS-232 serial interface to connect to MODEM.
96
CTS#
IN
t
Clear To Send
95
DSR#
IN
t
Data Set Ready
94
RTS#
OUT
8
Request To Send