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參數(shù)資料
| 型號(hào)： | W83194BR-63S |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | XO, clock |
| 英文描述： | STEP-LESS CLOCK FOR SIS CHIPSET |
| 中文描述： | 166 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大小： | 237K |
| 代理商： | W83194BR-63S |
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W83194BR-63S
STEP-LESS CLOCK FOR SIS CHIPSET
Publication Release Date: May 19, 2005
- 1 -
Revision 1.0
Table of Content-
1.
2.
3.
4.
GENERAL DESCRIPTION ......................................................................................................... 2
PRODUCT FEATURES.............................................................................................................. 2
PIN CONFIGURATION............................................................................................................... 3
PIN DESCRIPTION..................................................................................................................... 3
4.1
Crystal I/O....................................................................................................................... 3
4.2
CPU, SDRAM, PCI ,AGP Clock Outputs........................................................................ 4
4.3
I2C Control Interface....................................................................................................... 5
4.4
Fixed Frequency Outputs ............................................................................................... 5
4.5
Power Pins...................................................................................................................... 5
FREQUENCY SELECTION BY HARDWARE............................................................................ 6
SERIAL CONTROL REGISTERS............................................................................................... 6
6.1
Register 0: Frequency Select Register........................................................................... 9
6.2
Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)............................................ 9
6.3
Register 2: PCI Clock Register (1 = Active, 0 = Inactive)............................................... 9
6.4
Register 3: SDRAM Clock Additional Register (1 = Active, 0 = Inactive)..................... 10
6.5
Register 4: PCI Clock Additional Register (1 = Active, 0 = Inactive)............................ 10
6.6
Register 5: Skew Register............................................................................................ 10
6.7
Register 6: Watchdog Timer Register .......................................................................... 11
6.8
Register 7: M/N Program Register and Divisor............................................................ 11
6.9
Register 8: M/N Program Register ............................................................................... 11
6.10
Register 9: Divisor Register.......................................................................................... 12
6.11
Register 10: Divisor Register........................................................................................ 12
6.12
Register 11: Winbond Chip ID Register (Read Only) ................................................ 12
6.13
Register 12: Winbond Chip ID Register (Read Only) ................................................ 13
ORDERING INFORMATION .................................................................................................... 14
HOW TO READ THE TOP MARKING...................................................................................... 14
PACKAGE DRAWING AND DIMENSIONS.............................................................................. 15
REVISION HISTORY................................................................................................................ 16
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10.
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