參數資料
型號: W78M32V90BM
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類: PROM
英文描述: 8M X 32 FLASH 3.3V PROM, 90 ns, PBGA159
封裝: 13 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-159
文件頁數: 20/54頁
文件大小: 789K
代理商: W78M32V90BM
27
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M32V-XBX
April 2006
Rev. 3
White Electronic Designs Corp. reserves the right to change products or specications without notice.
COMMAND DEFINITIONS
Writing specic address and data commands or sequences
into the command register initiates device operations. Table
13 denes the valid register command sequences. Writing
incorrect address and data values
or writing them in the
improper sequence
may place the device in an unknown
state. A reset command is then required to return the device
to reading array data.
All addresses are latched on the falling edge of WE# or CS#,
whichever happens later. All data is latched on the rising
edge of WE# or CS#, whichever happens rst. Refer to the
AC Characteristic section for timing diagrams.
Reading Array Data
The device is automatically set to reading array data after
device power-up. No commands are required to retrieve
data. Each bank is ready to read array data after completing
an Embedded Program or Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the
corresponding bank enters the erase-suspend- read mode,
after which the system can read data from any non-erase-
suspended sector within the same bank. The system can
read array data using the standard read timing, except that
if it reads at an address within erase-suspended sectors, the
device outputs status data. After completing a programming
operation in the Erase Suspend mode, the system may
once again read array data with the same exception. See
the Erase Suspend/Erase Resume Commands section for
more information.
The system must issue the reset command to return a bank
to the read (or erase-suspend-read) mode if DQ5 goes
high during an active program or erase operation, or if the
bank is in the autoselect mode. See the next section, Reset
Command, for more information.
See also Requirements for Reading Array Data in the
Device Bus Operations section for more information. The
AC Characteristic table provides the read parameters, and
Figure 11 shows the timing diagram.
Reset Command
Writing the reset command resets the banks to the read or
erase-suspend-read mode. Address bits are don’t cares
for this command.
The reset command may be written between the sequence
cycles in an erase command sequence before erasing
begins. This resets the bank to which the system was writing
to the read mode. Once erasure begins, however, the device
ignores reset commands until the operation is complete.
The reset command may be written between the sequence
cycles in a program command sequence before programming
begins. This resets the bank to which the system was writing
to the read mode. If the program command sequence is
written to a bank that is in the Erase Suspend mode, writing
the reset command returns that bank to the erase-suspend-
read mode. Once programming begins, however, the device
ignores reset commands until the operation is complete.
The reset command may be written between the sequence
cycles in an autoselect command sequence. Once in the
autoselect mode, the reset command must be written to
return to the read mode. If a bank entered the autoselect
mode while in the Erase Suspend mode, writing the reset
command returns that bank to the erase-suspend-read
mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the banks to the read
mode (or erase-suspend-read mode if that bank was in
Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes, and
determine whether or not a sector is protected.
The autoselect command sequence may be written to an
address within a bank that is either in the read or erase-
suspend-read mode. The autoselect command may not be
written while the device is actively programming or erasing
in the other bank. The autoselect command sequence is
initiated by rst writing two unlock cycles. This is followed
by a third write cycle that contains the bank address and the
autoselect command. The bank then enters the autoselect
mode. The system may read any number of autoselect
codes without reinitiating the command sequence.
Table 13 shows the address and data requirements. To
determine sector protection information, the system must
write to the appropriate bank address (BA) and sector
address (SA). Table 4 shows the address range and bank
number associated with each sector.
The system must write the reset command to return to the
read mode (or erase-suspend-read mode if the bank was
previously in Erase Suspend).
Enter SecSi Sector/Exit SecSi Sector Command
Sequence
The SecSi Sector region provides a secured data area
containing a random, eight word electronic serial number
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