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參數(shù)資料
| 型號： | W78M32V-XBX |
| 英文描述： | 8Mx32 Flash 3.3V Page Mode Simultaneous Read/Write Operation Multi-Chip Package |
| 中文描述： | 8Mx32閃光3.3V的頁面模式同步讀/寫操作多芯片封裝 |
| 文件頁數(shù)： | 23/54頁 |
| 文件大小： | 756K |
| 代理商： | W78M32V-XBX |
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23
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W78M32V-XBX
April 2006
Rev. 3
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Once the SecSi Sector is locked and verified, the system
must write the Exit SecSi Sector Region command
sequence to return to reading and writing the remainder
of the array.
The SecSi Sector lock must be used with caution since,
once locked, there is no procedure available for unlocking
the SecSi Sector area and none of the bits in the SecSi
Sector memory space can be modified in any way.
FIGURE 5. SecSi SECTOR PROTECT VERIFY
program/erase circuits are disabled, and the device resets
to the read mode. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the proper
signals to the control pins to prevent unintentional writes
when V
CC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 3 ns (typical) on OE#, CS#, or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# = V
IL
,
CS# = V
IH
or WE# = V
IH
. To initiate a write cycle, CS# and
WE# must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
If WE# = CS# = V
IL
and OE# = V
IH
during power up, the
device does not accept commands on the rising edge of
WE#. The internal state machine is automatically reset to
the read mode on power-up.
COMMON FLASH MEMORY
INTERFACE (CFI)
The Common Flash Interface (CFI) specification outlines
device and host system software interrogation handshake,
which allows specific vendor-specified software algorithms
to be used for entire families of devices. Software support
can then be device-independent, JEDEC ID-independent,
and forward- and backward-compatible for the specified
flash device families. Flash vendors can standardize their
existing interfaces for long-term compatibility.
This device enters the CFI Query mode when the system
writes the CFI Query command, 98h, to address 55h, any
time the device is ready to read array data. The system
can read CFI information at the addresses given in Tables
9
–
12
. To terminate reading CFI data, the system must write
the reset command. The CFI Query mode is not accessible
when the device is executing an Embedded Program or
embedded Erase algorithm.
The system can also write the CFI query command when
the device is in the autoselect mode. The device enters the
CFI query mode, and the system can read CFI data at the
addresses given in Tables
9
–
12
. The system must write the
reset command to return the device to reading array data.
Write 60h to
any address
Write 40h to SecSi
Sector address
with A6 = 0,
A1 = 1, A0 = 0
RESET# =
V
IH
or V
ID
Wait 1 μs
Read from SecSi
Sector address
with A6 = 0,
A1 = 1, A0 = 0
If data = 00h,
SecSi Sector is
unprotected.
If data = 01h,
SecSi Sector is
protected.
Remove V
or V
ID
from RESET#
Write reset
command
SecSi Sector
Protect Verify
complete
START
SecSi Sector Protection Bits
The SecSi Sector Protection Bits prevent programming of
the SecSi Sector memory area. Once set, the SecSi Sector
memory area contents are non-modifiable.
Hardware Data Protection
The command sequence requirement of unlock cycles for
programming or erasing provides data protection against
inadvertent writes. In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
CC
power-up and
power-down transitions, or from system noise.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not accept
any write cycles. This protects data during V
CC
power-up
and power-down. The command register and all internal
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