參數(shù)資料
型號(hào): W78L365A24PL
廠商: WINBOND ELECTRONICS CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQCC44
封裝: ROHS COMPLIANT, PLASTIC, LCC-44
文件頁(yè)數(shù): 6/42頁(yè)
文件大?。?/td> 474K
代理商: W78L365A24PL
W78LE365/W78L365A
- 6 -
5.
FUNCTIONAL DESCRIPTION
The W78L365A architecture consists of a core controller surrounded by various registers, four general
purpose I/O ports, one special purpose programmable 4-bits I/O port, 256+1K bytes of RAM, three
timer/counters, a serial port. The processor supports 111 different opcodes and references both a 64K
program address space and a 64K data storage space.
5.1
RAM
The internal data RAM in the W78L365A is 256+1K bytes. It is divided into two banks: 256 bytes of
scratchpad RAM and 1K bytes of AUX-RAM. These RAMs are addressed by different ways.
RAM 0H
7FH can be addressed directly and indirectly as the same as in 8051. Address pointers
are R0 and R1 of the selected register bank.
RAM 80H
FFH can only be addressed indirectly as the same as in 8051. Address pointers are
R0, R1 of the selected registers bank.
AUX-RAM 0H
3FFH is addressed indirectly as the same way to access external data memory
with the MOVX instruction. Address pointer are R0 and R1 of the selected register bank and
DPTR register. An access to external data memory locations higher than 3FFH will be performed
with the MOVX instruction in the same way as in the 8051. The AUX-RAM is enable after a reset.
Setting the bit 4 in CHPCON register will enable the access to AUX-RAM. When executing from
internal program memory, an access to AUX-RAM will not affect the Ports P0, P2,
WR
and
RD
.
Example:
CHPENR REG F6H
CHPCON REG BFH
XRAMAH REG A1H
MOV CHPENR #87H
MOV CHPENR, #59H
ORL CHPCON, #00010000B ; enable AUX-RAM
MOV CHPENR, #00H
MOV XRAMAH, #01H ; internal high address
MOV R0, #23H
MOV A, #55H
MOVX @R0, A ; Write 55h data to 0123h AUX-RAM address.
MOV XRAMAH, #02H
MOV R1, #FFH ; Read data from 02FFh AUX-RAM address.
MOVX A, @R1
MOV DPTR, #0134H
MOV A, #78H
MOVX @DPTR,A ; Write 78h data to 0134h AUX-RAM address.
MOV DPTR, #7FFFH
MOVX A, @DPRT ; Read data from the external 7FFFh address SRAM
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