參數(shù)資料
型號(hào): W78L058A
廠商: WINBOND ELECTRONICS CORP
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 12/34頁(yè)
文件大?。?/td> 238K
代理商: W78L058A
W78LE58/W78L058A
- 12 -
attribute.
The W78L058A achieves all in-system programming operations including enter/exit ISP
Mode, program, erase, read ... etc, during device in the idle mode. Setting the bit CHPCON.0 the
device will enter in-system programming mode after a wake-up from idle mode. Because device
needs proper time to complete the ISP operations before awaken from idle mode, software may use
timer interrupt to control the duration for device wake-up from idle mode. To perform ISP operation for
revising contents of APROM, software located at APROM setting the CHPCON register then enter idle
mode, after awaken from idle mode the device executes the corresponding interrupt service routine in
LDROM. Because the device will clear the program counter while switching from APROM to LDROM,
the first execution of RETI instruction in interrupt service routine will jump to 00H at LDROM area. The
device offers a software reset for switching back to APROM while the content of APROM has been
updated completely.
Setting CHPCON register bit 0, 1 and 7 to logic-1 will result a software reset
to reset the CPU
. The software reset serves as a external reset. This in-system programming feature
makes the job easy and efficient in which the application needs to update firmware frequently. In some
applications, the in-system programming feature make it possible to easily update the system
firmware without opening the chassis.
Note:
The ISP Mode operates by supply voltage from 3.3V to 5.5V.
SFRAH, SFRAL:
The objective address of on-chip ROM in the in-system programming mode.
SFRAH contains the high-order byte of address, SFRAL contains the low-order
byte of address.
SFRFD:
The programming data for on-chip ROM in programming mode.
SFRCN:
The control byte of on-chip ROM programming mode.
SFRCN (C7)
BIT
NAME
FUNCTION
7
-
Reserve.
6
WFWIN
On-chip ROM bank select for in-system programming.
= 0: 32K bytes ROM bank is selected as destination for re-programming.
= 1: 4K bytes ROM bank is selected as destination for re-programming.
5
OEN
ROM output enable.
4
CEN
ROM chip enable.
3, 2, 1, 0
CTRL[3:0] The flash control signals
MODE
WFWIN
CTRL<3:0>
OEN
CEN
SFRAH, SFRAL
SFRFD
Erase 32KB APROM
0
0010
1
0
X
X
Program 32KB APROM
0
0001
1
0
Address in
Data in
Read 32KB APROM
0
0000
0
0
Address in
Data out
Erase 4KB LDROM
1
0010
1
0
X
X
Program 4KB LDROM
1
0001
1
0
Address in
Data in
Read 4KB LDROM
1
0000
0
0
Address in
Data out
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