參數(shù)資料
型號(hào): W78IRD2A
廠商: WINBOND ELECTRONICS CORP
元件分類: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 46/76頁(yè)
文件大小: 646K
代理商: W78IRD2A
W78IRD2/W78IRD2A
- 46 -
CMOD(D9H): PCA counter mode register
BIT
NAME
Counter idle control: CILD = 0 programs the PCA Counter to continue functioning
in idle mode; CILD = 1 programs it to stop in idle mode.
Watchdog Timer Enable: WDTE = 0 disables the Watchdog Timer function in
PCA module 4. WDTE = 1 enables it.
5
-
Reserved
4
-
Reserved
3
-
Reserved
2
CPS1
PCA Count Pulse Select bit 1
1
CPS0
PCA Count Pulse Select bit 0
PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to
generate an interrupt. ECF = 0 disables the interrupt.
FUNCTION
7
CILD
6
WDTE
0
ECF
There are three additional bits in the CMOD SFR. CILD allows the PCA to stop during idle mode,
WDTE enables and disables the watchdog function executed in module 4, and ECF causes an
interrupt when the PCA timer overflows (and the PCA overflow flag CF is set).
The CCON SFR contains the run-control bit for the PCA and the flags for the PCA timer overflow (CF)
and each module match / capture (CCFn).
CCON(D8H): PCA counter control register
BIT
NAME
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF
generates an interrupt if bit ECF in CMOD is set. CF may be set by either
hardware or software but can only be cleared by software.
PCA Counter Run control bit. Set by software to turn on the PCA counter. Must
be cleared by software to turn the PCA counter off.
5
-
Reserved
PCA Module4 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module3 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module2 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module1 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
PCA Module0 interrupt flag. Set by hardware when a match or capture occurs.
Must be cleared by software.
FUNCTION
7
CF
6
CR
4
CCF4
3
CCF3
2
CCF2
1
CCF1
0
CCF0
The CR bit (CCON.6) must be set by the software, and the PCA is turned off by clearing this bit. The
CF bit (CCON.7) is set when the PCA Counter overflows, and an interrupt is generated if the ECF bit
in the CMOD register is set. The CF bit can only be cleared by software. CCON.0~CCON.4 are the
flags for the modules and are set by hardware when either a match or a capture occurs. These flags
can only be cleared by software.
The next five sections provide more information about each of the five modes (four modes for all
registers and the watchdog timer in module 4).
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