參數(shù)資料
型號(hào): W78ERD2A40DL
廠商: WINBOND ELECTRONICS CORP
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40
封裝: ROHS COMPLIANT, DIP-40
文件頁(yè)數(shù): 12/76頁(yè)
文件大?。?/td> 650K
代理商: W78ERD2A40DL
W78ERD2/W78ERD2A
- 12 -
Continued
BIT
NAME
FUNCTION
3
GATE
Gating control: When this bit is set, Timer/Counter 0 is enabled only while the
INT0
pin is high and the TR0 control bit is set. When cleared, the
INT0
pin has no effect,
and Timer 0 is enabled whenever TR0 is set.
2
T
C/
Timer or Counter Select: When cleared, Timer 0 is incremented by the internal
clock. When set, Timer 0 counts falling edges on the T0 pin.
1
M1
Timer 0 Mode Select bits: See below.
0
M0
Timer 0 Mode Select bits: See below.
M1, M0: Mode Select bits:
M1
M0
0
0
0
1
1
0
1
1
Mode
Mode 0: 8048 timer, TLx serves as 5-bit pre-scale.
Mode 1: 16-bit timer/counter, no pre-scale.
Mode 2: 8-bit timer/counter with auto-reload from THx
Mode 3:
(Timer 0) TL0 is an 8-bit timer/counter controlled by the standard Timer-0 control
bits. TH0 is an 8-bit timer only controlled by Timer-1 control bits.
(Timer 1) Timer/Counter 1 is stopped.
Timer 0 LSB
Bit:
7
6
5
4
3
2
1
0
TL0.7
TL0.6
TL0.5
TL0.4
TL0.3
TL0.2
TL0.1
TL0.0
Mnemonic: TL0 Address: 8Ah
TL0.7-0: Timer 0 Low byte
Timer 1 LSB
Bit:
7
6
5
4
3
2
1
0
TL1.7
TL1.6
TL1.5
TL1.4
TL1.3
TL1.2
TL1.1
TL1.0
Mnemonic: TL1 Address: 8Bh
TL1.7-0: Timer 1 Low byte
Timer 0 MSB
Bit:
7
6
5
4
3
2
1
0
TH0.7
TH0.6
TH0.5
TH0.4
TH0.3
TH0.2
TH0.1
TH0.0
Mnemonic: TH0 Address: 8Ch
TH0.7-0: Timer 0 High byte
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