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參數(shù)資料
| 型號： | W78E51C |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 8 bit micocontroller |
| 中文描述： | 8位micocontroller |
| 文件頁數(shù)： | 7/23頁 |
| 文件大?。?/td> | 302K |
| 代理商： | W78E51C |
W78E51C
Publication Release Date: April 20, 2005
- 7 -
Revision A2
6. FUNCTIONAL DESCRIPTION
The W78E51C architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 128 bytes of RAM, two timer/counters, and a serial port. The processor supports
111 different opcodes and references both a 64K program address space and a 64K data storage
space.
6.1 New Defined Peripheral
In order to be more suitable for I/O, an extra 4-bit bit-addressable port P4 and two external interrupt
INT2
, INT3 has been added to either the PLCC or QFP 44 pin package. And description follows:
INT2
/
INT3
Two additional external interrupts, INT2 and INT3 , whose functions are similar to those of external
interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are
determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register is
bit-addressable but is not a standard register in the standard 80C52. Its address is at 0C0H. To
set/clear bits in the XICON register, one can use the "SETB (/CLR) bit" instruction. For example,
"SETB 0C2H" sets the EX2 bit of XICON.
XICON - external interrupt control (C0H)
PX3
EX3
IE3
IT3
PX2
EX2
IE2
IT2
PX3: External interrupt 3 priority high if set
EX3: External interrupt 3 enable if set
IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced
IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software
PX2: External interrupt 2 priority high if set
EX2: External interrupt 2 enable if set
IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced
IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software
Seven-source interrupt information
INTERRUPT SOURCE
VECTOR
ADDRESS
POLLING SEQUENCE
WITHIN PRIORITY
LEVEL
ENABLE
REQUIRED
SETTINGS
INTERRUPT TYPE
EDGE/LEVEL
External Interrupt 0
03H
0 (highest)
IE.0
TCON.0
Timer/Counter 0
0BH
1
IE.1
-
External Interrupt 1
13H
2
IE.2
TCON.2
Timer/Counter 1
1BH
3
IE.3
-
Serial Port
23H
4
IE.4
-
External Interrupt 2
33H
5
XICON.2
XICON.0
External Interrupt 3
3BH
6 (lowest)
XICON.6
XICON.3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W78E51 | 8-BIT MTP Monitor Microcontroller(多次可編程的8位的監(jiān)視微控制器) |
| W78E52 | 8-BIT MTP Monitor Microcontroller(多次可編程的8位的監(jiān)視微控制器) |
| W78E56B | 8-BIT Microcontroller(8位的微控制器) |
| W78E516BP-24 | 8-BIT MICROCONTROLLER |
| W78E516BP-40 | 8-BIT MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W78E51C_06 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8-BIT MICROCONTROLLER |
| W78E51P-16 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| W78E51P-24 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| W78E51P-33 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| W78E51P-40 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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