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參數(shù)資料
| 型號(hào)： | W78C33 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 8-BIT Microcontroller(8位的微控制器) |
| 中文描述： | 8位微控制器（8位的微控制器） |
| 文件頁(yè)數(shù)： | 7/18頁(yè) |
| 文件大?。?/td> | 217K |
| 代理商： | W78C33 |
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W78C33
Publication Release Date: October 1997
- 7 -
Revision A1
Reset
The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two
machine cycles while the oscillator is running.
An internal trigger circuit in the reset line is used to deglitch the reset line when the W78C33 is used
with an external RC network. The reset logic also has a special glitch removal circuit that ignores
glitches on the reset line.
During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of
bit 4) to 00H, and all of the other SFR registers except SBUF to 00H. SBUF is not reset.
New Defined Peripheral
In order to be more suitable for I/O, an extra 4-bit bit-addressable port P4 and two external interrupt
INT2
, INT3 has been added to either the PLCC or QFP 44 pin package. And description follows:
1. INT2/ INT3
Two additional external interrupts,
INT2
and INT3 , whose functions are similar to those of external
interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are
determined/shown by the bits in the XICON (External Interrupt Control) register. The XICON register
is bit-addressable but is not a standard register in the standard 80C52. Its address is at 0C0H. To
set/clear bits in the XICON register, one can use the "SETB (/CLR) bit" instruction. For example,
"SETB 0C2H" sets the EX2 bit of XICON.
***XICON - external interrupt control (C0H)
PX3
EX3
IE3
IT3
PX2
EX2
IE2
IT2
PX3: External interrupt 3 priority high if set
EX3: External interrupt 3 enable if set
IE3: If IT3 = 1, IE3 is set/cleared automatically by hardware when interrupt is detected/serviced
IT3: External interrupt 3 is falling-edge/low-level triggered when this bit is set/cleared by software
PX2: External interrupt 2 priority high if set
EX2: External interrupt 2 enable if set
IE2: If IT2 = 1, IE2 is set/cleared automatically by hardware when interrupt is detected/serviced
IT2: External interrupt 2 is falling-edge/low-level triggered when this bit is set/cleared by software
Eight-source interrupt informations:
INTERRUPT
SOURCE
VECTOR
ADDRESS
POLLING
SEQUENCE WITHIN
PRIORITY LEVEL
0 (highest)
1
2
3
ENABLE
REQUIRED
SETTINGS
IE.0
IE.1
IE.2
IE.3
INTERRUPT
TYPE
EDGE/LEVEL
TCON.0
-
TCON.2
-
External Interrupt 0
Timer/Counter 0
External Interrupt 1
Timer/Counter 1
03H
0BH
13H
1BH
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| W78C33B | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:8-BIT MICROCONTROLLER |
| W78C33B-24 | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:8-BIT MICROCONTROLLER |
| W78C33B-40 | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:8-BIT MICROCONTROLLER |
| W78C33BF-24 | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:8-BIT MICROCONTROLLER |
| W78C33BF-40 | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:8-BIT MICROCONTROLLER |
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