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參數(shù)資料
| 型號： | W3HG2128M72AEF534F1SAG |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 256M X 72 DDR DRAM MODULE, DMA240 |
| 封裝： | ROHS COMPLIANT, DIMM-240 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大小： | 348K |
| 代理商： | W3HG2128M72AEF534F1SAG |
W3HG2128M72AEF-Fx
June 2007
Rev. 3
ADVANCED*
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
GENERAL DESCRIPTION
WEDC FBDIMM is a high-bandwidth, large-capacity-
channel solution that has narrow host interface.
FBDIMMs used DDR2 SDRAM devices isolated from
the channel behind a buffer on the FBDIMM. Memory
device capacity remains high and total memory capacity
scales with DDR2 SDRAM bit density.
As shown in Figure 1, the FBDIMM channel provides a
communication path from a host controller to an array of
DDR2 SDRAM devices, with the DDR2 SDRAM devices
buffered behind an AMB device. The physical isolation
of the DDR2 SDRAM devices from the channel enables
the exibility to enhance the communication path to
signicantly increase the reliability and availability of the
memory subsystem.
WEDC FBDIMM features a novel architecture, including
the AMB that isolates the DDR2 SDRAM devices from
the channel. This single-chip AMB component, located
in the center of each FBDIMM, acts as a repeater
and buffer for all signals and commands exchanged
between the host controller and the DDR2 SDRAM
devices, including data input and output. The AMB
communicates with the host controller and adjacent
FBDIMMs on a system board using an industry-
standard, high-speed, differential, point-to-point,
interface at 1.5V.
The AMB also allows buffering of memory trafc to
support large memory capacities. All memory control for
the DDR2 SDRAM devices resides in the host, including
memory request initiation, timing, refresh, scrubbing,
sparing, conguration access, and power management.
The AMB interface is responsible for handling channel
and memory requests to and from the local FBDIMM
and for forwarding requests to other FBDIMMs on the
memory channel.
FIGURE 1: FBDIMM Solution Block Diagram
CLK
Source
SMBus
Up to 8 modules
Memory
Controller
10
14
Commodity
DDR2 SDRAM
Devices
DDR2 connector with unique key
Common clock source
SMbus access
to buffer registers
AMB
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
AMB
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
AMB
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
AMB
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
DDR2
Component
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3HG264M72EER403AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER534AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER665AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER806AD7XG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3HG264M72EER-AD7 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:1GB - 2x64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
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