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參數(shù)資料
| 型號： | W3HG2128M64EEU805XD4IMG |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 256M X 64 DDR DRAM MODULE, 0.4 ns, ZMA200 |
| 封裝： | ROHS COMPLIANT, SODIMM-200 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 188K |
| 代理商： | W3HG2128M64EEU805XD4IMG |
W3HG2128M64EEU-D4
January 2008
Rev. 7
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
DC OPERATING CONDITIONS
All voltages referenced to VSS
Parameter
Symbol
Rating
Units
Notes
Min.
Typ.
Max.
Supply Voltage
VCC
1.7
1.8
1.9
V
I/O Reference Voltage
VREF
0.49 x VCC
0.50 x VCC
0.51 x VCC
V1
I/O Termination Voltage
VTT
VREF-0.04
VREF
VREF+0.04
V
2
Notes:
1. VREF is expected to equal VCC/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed +/-1 percent of the DC
value. Peak-to-peak AC noise on VREF may not exceed +/-2 percent of VREF. This measurement is to be taken at the nearest VREF bypass capacitor.
2. VTT in sot applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track variations in the DC level of VREF.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Units
VCC
Voltage on VCC pin relative to VSS
-0.5
2.3
V
VIN, VOUT
Voltage on any pin relative to VSS
-0.5
2.3
V
TSTG
Storage Temperature
-55
100
C
IL
Input leakage current; Any input 0V<VIN<VCC; VREF input
0V<VIN<0.95V; Other pins not under test = 0V
Command/Address,
RAS#, CAS#, WE#
-80
80
μA
CS#, CKE
-40
40
μA
CK, CK#
-40
40
μA
DM
-10
10
μA
IOZ
Output leakage current; 0V<VIN<VCC; DQs and ODT are
disable
DQ, DQS, DQS#
-10
10
μA
IVREF
VREF leakage current; VREF = Valid VREF level
-32
32
μA
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