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參數(shù)資料
| 型號(hào)： | W3H64M72E-667SBMF |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM, PBGA208 |
| 封裝： | 16 X 22 MM, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-208 |
| 文件頁(yè)數(shù)： | 21/32頁(yè) |
| 文件大?。?/td> | 944K |
| 代理商： | W3H64M72E-667SBMF |
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W3H64M72E-XSBX
W3H64M72E-XSBXF
28
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
December 2009
2010 White Electronic Designs Corp. All rights reserved
Rev. 9
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Parameter
Symbol
667Mbs CL6
533Mbs CL5
400Mbs CL4
Unit
Min
Max
Min
Max
Min
Max
ODT
ODT tum-on delay
t
AOND
222222
tCK
ODT turn-on
t
AON
tAC(MIN)
tAC(MAX) + 700
tAC(MIN)
tAC(MAX) + 1000
tAC(MIN)
tAC(MAX) + 1000
ps
ODT turn-off delay
t
AOFD
2.5
tCK
ODT tum-off
t
AOF
tAC(MIN)
tAC(MAX) + 600
tAC(MIN)
tAC(MAX) + 600
tAC(MIN)
tAC(MAX) + 600
ps
ODT tum-on (power-down mode)
t
AONPD
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) + 1000
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) + 1000
tAC(MIN) +
2000
2 x tCK +
tAC(MAX) + 1000
ps
ODT turn-off (power-down mode)
t
AOFPD
tAC(MIN) +
2000
2.5 x tCK +
tAC(MAX) + 1000
tAC(MIN) +
2000
2.5 x tCK +
tAC(MAX) + 1000
tAC(MIN) +
2000
2.5 x tCK +
tAC(MAX) + 1000
ps
ODT to power-down entry latency
t
ANPD
3
tCK
ODT power-down exit latency
t
AXPD
8
tCK
ODT enable from MRS command
t
MOD
12
ns
Power-Down
Exit active power-down to READ
command, MR[bit12=0]
t
XARD
2
tCK
Exit active power-down to READ
command, MR[bit12=1]
t
XARDS
7-AL
6-AL
tCK
Exit precharge power-down to any
non-READ command
t
XP
222
tCK
CKE minimum high/low time
t
CKE
3
tCK
AC TIMING PARAMETERS
(continued)
-55°C ≤ TA < +125°C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W3H64M72E-533SBI | 64M X 72 DDR DRAM, 0.5 ns, PBGA208 |
| W3HG2256M72ACER665D6IMG | 512M X 72 DDR DRAM MODULE, 0.45 ns, DMA240 |
| W3HG2256M72ACER534D6ISG | 512M X 72 DDR DRAM MODULE, 0.5 ns, DMA240 |
| W3HG2256M72ACER665D6ISG | 512M X 72 DDR DRAM MODULE, 0.45 ns, DMA240 |
| W3HG2256M72ACER665D6SG | 512M X 72 DDR DRAM MODULE, 0.45 ns, DMA240 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3H64M72EERXXXAD7MG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3H64M72EERXXXAD7SG | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR2 SDRAM REGISTERED, w/PLL, VLP Mini-DIMM |
| W3H64M72E-ES | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-ESC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
| W3H64M72E-ESI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:64M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package |
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