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參數(shù)資料
| 型號(hào)： | W3EG7265S202JD3SG |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM, 0.75 ns, DMA184 |
| 封裝： | ROHS COMPLIANT, DIMM-184 |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大?。?/td> | 195K |
| 代理商： | W3EG7265S202JD3SG |
9
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W3EG7265S-JD3
January 2005
Rev. 3
PRELIMINARY
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS (continued)
AC Characteristics
262
265/202
Parameter
Symbol
Min
Max
Min
Max
Units
Notes
ACTIVE to READ or WRITE delay
tRCD
15
20
ns
PRECHARGE command period
tRP
15
20
ns
DQS read preamble
tRPRE
0.9
1.1
0.9
1.1
tCK
19
DQS read postamble
tRPST
0.4
0.6
0.4
0.6
tCK
ACTIVE bank a to ACTIVE bank b command
tRRD
15
ns
DQS write preamble
tWPRE
0.25
tCK
DQS write preamble setup time
tWPRES
0
ns
10,11
DQS write postamble
tWPST
0.4
0.6
0.4
0.6
tCK
9
Write recovery time
tWR
15
ns
Internal WRITE to READ command delay
tWTR
11
tCK
Data valid output window
NA
tQH-tDQSQ
ns
13
REFRESH to REFRESH command interval
tREFC
70.3
μs
12
Average periodic refresh interval
tREFI
7.8
μs
12
Terminating voltage delay to VCC
tVTD
00
ns
Exit SELF REFRESH to non-READ command
tXSNR
75
ns
Exit SELF REFRESH to READ command
tXSRD
200
tCK
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3EG7265S262JD3 | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:512MB - 2x32Mx72 DDR SDRAM REGISTERED, w/PLL |
| W3EG7265S265JD3 | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:512MB - 2x32Mx72 DDR SDRAM REGISTERED, w/PLL |
| W3EG7265S-JD3 | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:512MB - 2x32Mx72 DDR SDRAM REGISTERED, w/PLL |
| W3EG7266S202AD4 | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR SDRAM UNBUFFERED ECC w/PLL |
| W3EG7266S202AD4I | 制造商:WEDC 制造商全稱(chēng):White Electronic Designs Corporation 功能描述:512MB - 64Mx72 DDR SDRAM UNBUFFERED ECC w/PLL |
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