參數(shù)資料
型號(hào): W3EG7218S265AD4
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類: DRAM
英文描述: 16M X 72 DDR DRAM MODULE, 0.75 ns, DMA200
封裝: SODIMM-200
文件頁(yè)數(shù): 9/13頁(yè)
文件大?。?/td> 179K
代理商: W3EG7218S265AD4
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
November 2004
Rev. 1
PRELIMINARY
W3EG7218S-AD4
-BD4
IDD SPECIFICATIONS AND TEST CONDITIONS
(Recommended operating conditions, 0°C TA 70°C, VCCQ = 2.5V ± 0.2V, VCC = 2.5V ± 0.2V)
Parameter
Symbol Conditions
DDR266
@CL=2
DDR266
@CL=2.5
DDR200
@CL=2
Units
Max
Operating Current
IDD0
One device bank; Active - Precharge; (MIN); DQ,DM and DQS
inputs changing once per clock cycle; Address and control
inputs changing once every two cycles. tRC=tRC(MIN); tCK=tCK
1125
990
mA
Operating Current
IDD1
One device bank; Active-Read-Precharge; Burst = 2;
tRC=tRC(MIN);tCK=tCK (MIN); Iout = 0mA; Address and control
inputs changing once per clock cycle.
1215
1080
mA
Precharge Power-
Down Standby Current
IDD2P
All device banks idle; Power-down mode; tCK=tCK(MIN);
CKE=(low)
27
mA
Idle Standby Current
IDD2F
CS# = High; All device banks idle; tCK=tCK(MIN); CKE = high;
Address and other control inputs changing once per clock cycle.
VIN = VREF for DQ, DQS and DM.
405
mA
Active Power-Down
Standby Current
IDD3P
One device bank active; Power-down mode; tCK(MIN);
CKE=(low)
225
mA
Active Standby Current
IDD3N
CS# = High; CKE = High; One device bank; Active-Precharge;
tRC=tRAS(MAX); tCK=tCK(MIN); DQ, DM and DQS inputs
changing twice per clock cycle; Address and other control
inputs changing once per clock cycle.
450
mA
Operating Current
IDD4R
Burst = 2; Reads; Continous burst; One device bank
active;Address andcontrol inputs changing once per clock
cycle; tCK=tCK(MIN); IOUT = 0mA.
1260
1170
mA
Operating Current
IDD4W
Burst = 2; Writes; Continous burst; One device bank active;
Address and control inputs changing once per clock cycle;
tCK=tCK(MIN); DQ,DM and DQS inputs changing twice per clock
cycle.
1260
1125
mA
Auto Refresh Current
IDD5
tRC=tRC(MIN)
2385
1980
mA
Self Refresh Current
IDD6
CKE ≤ 0.2V
27
mA
Operating Current
IDD7A
Four bank interleaving Reads (BL=4) with auto precharge with
tRC=tRC (MIN); tCK=tCK(MIN); Address and control inputs change
only during Active Read or Write commands
3195
2970
mA
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