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參數(shù)資料
| 型號： | W3EG6464S202JD3G |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 64M X 64 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | ROHS COMPLIANT, DIMM-184 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 293K |
| 代理商： | W3EG6464S202JD3G |
White Electronic Designs
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
May 2005
Rev. 3
W3EG6464S-JD3-D3
PRELIMINARY*
FEATURES
Double-data-rate architecture
DDR200 and DDR266
JEDEC design specication
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Power supply: VCC: 2.5V ± 0.20V
JEDEC standard 184 pin DIMM package
Package height option:
JD3: 30.48mm (1.20")
NOTE: Consult factory for availability of:
Lead-Free Products
Vendor source control options
Industrial temperature options
DESCRIPTION
The W3EG6464S is a 64Mx64 Double Data Rate
SDRAM memory module based on 512Mb DDR SDRAM
components. The module consists of eight 64Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualied or characterized and is subject to
change without notice.
512MB – 64Mx64 DDR SDRAM UNBUFFERED
OPERATING FREQUENCIES
DDR266 @CL=2
DDR266 @CL=2.5
DDR266 @CL=2
DDR200 @CL=2
Clock Speed
133MHz
100MHz
CL-tRCD-tRP
2-2-2
2.5-3-3
2-3-3
2-2-2
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| W3EG6464S262AD4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR SDRAM UNBUFFERED w/PLL |
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