參數(shù)資料
型號(hào)： W320-04H
廠商： Silicon Laboratories Inc
文件頁數(shù)： 1/16頁
文件大小： 0K
描述： IC CLK/DRVR CPUOUT 200MHZ 56SSOP
標(biāo)準(zhǔn)包裝： 26
類型： *
PLL： 是
輸入： 晶體
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 1:22
差分 - 輸入:輸出： 無/是
頻率 - 最大： 200MHz
除法器/乘法器： 是/無
電源電壓： 3.135 V ~ 3.465 V
工作溫度： 0°C ~ 70°C
安裝類型： *
封裝/外殼： *
供應(yīng)商設(shè)備封裝： *
包裝： *
200 MHz Spread Spectrum Clock Synthesizer/Driver
with Differential CPU Outputs
W320-04
....................... Document #: 38-07010 Rev. *C Page 1 of 16
400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
Features
Compliant with Intel CK-Titan clock synthesizer/driver
specifications
Multiple output clocks at different frequencies
— Three pairs of differential CPU outputs, up to
200 MHz
— Ten synchronous PCI clocks, three free-running
— Six 3V66 clocks
— Two 48 MHz clocks
— One reference clock at 14.318 MHz
— One VCH clock
Spread Spectrum clocking (down spread)
Power-down features (PCI_STOP#, CPU_STOP#
PWR_DWN#)
Three Select inputs (Mode select and IC Frequency
Select)
OE and Test Mode support
56-pin SSOP package and 56-pin TSSOP package
Benefits
Supports next-generation Pentium processors using
differential clock drivers
Motherboard clock generator
— Supports multiple CPUs and a chipset
— Support for PCI slots and chipset
— Supports AGP, DRCG reference, and Hub Link
— Supports USB host controller and graphic controller
— Supports ISA slots and I/O chip
Enables reduction of electromagnetic interference
(EMI) and overall system cost
Enables ACPI-compliant designs
Supports up to four CPU clock frequencies
Enables ATE and “bed of nails” testing
Widely available standard package enables lower cost
Logic Block Diagram
SSOP and TSSOP
Top View
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
36
35
VDD_REF
34
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
XTAL_IN
XTAL_OUT
GND_REF
25
26
27
28
49
52
51
50
53
56
55
54
PCI0
PCI5
66BUFF2/3V66_4
GND_3V66
PCI_STOP#
S2
GND_CPU
CPU_STOP#
PCI_F2
GND_PCI
GND_3V66
VDD_CORE
VDD_ 48 MHz
MULT0#
VDD_CPU
REF
PCI_F0
PCI_F1
VDD_PCI
GND_PCI
PCI1
PCI2
PCI3
VDD_PCI
PCI4
PCI6
VDD_3V66
66BUFF0/3V66_2
66BUFF1/3V66_3
66IN/3V66_5
PWR_DWN#
3V66_0
VDD_3V66
3V66_1/VCH
GND_ 48 MHz
DOT
USB
GND_IREF
IREF
CPU#2
CPU2
VDD_CPU
CPU#1
CPU1
CPU#0
CPU0
S0
S1
GND_CORE
PWR_GD#
SCLK
SDATA
W32
0
-04
VDD_REF
CPU0:2
CPU#0:2
PCI_F0:2
XTAL
PLL Ref Freq
X2
X1
REF
VDD_PCI
USB (48MHz)
VCH_CLK/ 3V66_1
OSC
VDD_CPU
CPU_STOP#
SCLK
PCI0:6
PCI_STOP#
Stop
Clock
Control
Stop
Clock
Control
PLL 1
SMBus
Logic
DOT (48MHz)
PWR_DWN#
S0:2
VDD_48MHz
SDATA
VDD_3V66
3V66_0
3V66_2:4/
Divider
Network
3V66_5/ 66IN
PWR
PLL 2
PWR
66BUFF0:2
Gate
PWR_GD#
Pin Configurations
/2
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