參數(shù)資料
型號: W320-03
英文描述: Clocks and Buffers
中文描述: 時鐘和緩沖器
文件頁數(shù): 1/17頁
文件大?。?/td> 174K
代理商: W320-03
200-MHz Spread Spectrum Clock Synthesizer/Driver
with Differential CPU Outputs
W320-03
Cypress Semiconductor Corporation
Document #: 38-07248 Rev. *B
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised March 18, 2003
Features
Benefits
Compliant with Intel
CK-Titan Clock Synthesizer/Driver
Specifications
Multiple output clocks at different frequencies
—Three pairs of differential CPU outputs, up to 200 MHz
—Ten synchronous PCI clocks, three free-running
—Six 3V66 clocks
—Two 48-MHz clocks
—One reference clock at 14.318 MHz
—One VCH clock
Spread Spectrum clocking (down spread)
Supports next-generation Pentium
processors using differ-
ential clock drivers
Motherboard clock generator
—Support Multiple CPUs and a chipset
—Support for PCI slots and chipset
—Supports AGP, DRCG reference and Hub Link
—Supports USB host controller and graphic controller
—Supports ISA slots and I/O chip
Enables reduction of electromagnetic interference (EMI) and
overall system cost
Enables ACPI-compliant designs
Power-down features (PCI_STOP#, CPU_STOP#
PWR_DWN#)
Three Select inputs (Mode select & IC Frequency Select)
Supports up to four CPU clock frequencies
OE and Test Mode support
56-pin SSOP package and 56-pin TSSOP package
Enables ATE and “bed of nails” testing
Widely available, standard package enables lower cost
Logic Block Diagram
SSOP & TSSOP
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
33
32
31
30
29
36
35
34
VDD_REF
XTAL_IN
XTAL_OUT
GND_REF
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
45
44
43
42
41
37
38
39
40
48
47
46
49
52
51
50
53
56
55
54
PCI0
PCI1
PCI2
PCI5
PCI6
66BUFF2/3V66_4
66IN/3V66_5
GND_3V66
PCI_STOP#
3V66_0
S2
USB
GND_CPU
VDD_CPU
CPU_STOP#
PCI_F2
VDD_PCI
GND_PCI
GND_3V66
VDD_CORE
GND_CORE
PWR_GD#
VDD_ 48 MHz
MULT0
VDD_CPU
CPU1
REF
PCI_F0
PCI_F1
GND_PCI
PCI3
VDD_PCI
PCI4
VDD_3V66
66BUFF0/3V66_2
66BUFF1/3V66_3
PWR_DWN#
VDD_3V66
3V66_1/VCH
GND_ 48 MHz
DOT
GND_IREF
IREF
CPU#2
CPU2
CPU#1
CPU#0
CPU0
S0
S1
SCLK
SDATA
W
Pin Configurations
VDD_REF
REF
CPU0:2
CPU#0:2
PCI_F0:2
XTAL
OSC
PLL Ref Freq
X2
X1
VDD_PCI
USB (48MHz)
VCH_CLK/ 3V66_1
VDD_CPU
CPU_STOP#
SCLK
PCI0:6
PCI_STOP#
Stop
CStop
PLL 1
SMBus
Logic
DOT (48MHz)
PWR_DWN#
S0:2
VDD_48MHz
SDATA
VDD_3V66
3V66_0
3V66_2:4/
66BUFF0:2
Divider
Network
3V66_5/ 66IN
PWR
PWR
PWR
PWR
PWR
PLL 2
PWR
Gate
PWR_GD#
/2
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