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參數(shù)資料
| 型號： | W24L11S-70L |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 70 ns, PDSO32 |
| 封裝： | 0.450 INCH, SOP-32 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 195K |
| 代理商： | W24L11S-70L |
Preliminary W24L11
- 4 -
AC Characteristics, continued
(VDD = 3.0V to 3.6 V; VSS = 0V; TA (
°C) = 0 to 70)
Read Cycle
PARAMETER
SYMBOL
W24L11-70L/LL
UNIT
MIN.
MAX.
Read Cycle Time
TRC
70
-
nS
Address Access Time
TAA
-
70
nS
Chip Select Access Time
TACS
-
70
nS
Output Enable to Output Valid
TAOE
-
35
nS
Chip Selection to Output in Low Z
TCLZ*
10
-
nS
Output Enable to Output in Low Z
TOLZ*
5
-
nS
Chip Deselection to Output in High Z
TCHZ*
-
30
nS
Output Disable to Output in High Z
TOHZ*
-
30
nS
Output Hold from Address Change
TOH
10
-
nS
These parameters are sampled but not 100% tested
Write Cycle
PARAMETER
SYMBOL
W24L11-70L/LL
UNIT
MIN.
MAX.
Write Cycle Time
TWC
70
-
nS
Chip Selection to End of Write
TCW
55
-
nS
Address Valid to End of Write
TAW
55
-
nS
Address Setup Time
TAS
0
-
nS
Write Pulse Width
TWP
50
-
nS
Write Recovery Time
CS1
, CS2, WE
TWR
0
-
nS
Data Valid to End of Write
TDW
45
-
nS
Data Hold from End of Write
TDH
0
-
nS
Write to Output in High Z
TWHZ*
-
25
nS
Output Disable to Output in High Z
TOHZ*
-
25
nS
Output Active from End of Write
TOW
5
-
nS
These parameters are sampled but not 100% tested
相關(guān)PDF資料 |
PDF描述 |
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| W24V04S-85LI | 512K X 8 STANDARD SRAM, 85 ns, PDSO32 |
| W24V04B-85LE | 512K X 8 STANDARD SRAM, 85 ns |
| W24V04Q-85LI | 512K X 8 STANDARD SRAM, 85 ns, PDSO32 |
| W25B20-VSNI-G | 256K X 8 FLASH 2.7V PROM, PDSO8 |
| W25P012AD-8 | 32K X 32 STANDARD SRAM, 8 ns, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W24L11S-70LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24L11S-70LL | 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 High Speed CMOS Static RAM |
| W24L11T-70L | 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 High Speed CMOS Static RAM |
| W24L11T-70LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24L11T-70LL | 制造商:WINBOND 制造商全稱:Winbond 功能描述:128K X 8 High Speed CMOS Static RAM |
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