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參數(shù)資料
| 型號： | W224BX |
| 英文描述： | CPU SYSTEM CLOCK GENERATOR|TSSOP|56PIN|PLASTIC |
| 中文描述： | CPU系統(tǒng)時(shí)鐘發(fā)生器|采用TSSOP | 56PIN |塑料 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大小： | 349K |
| 代理商： | W224BX |
133-MHz Spread Spectrum FTG for Mobile Pentium III Platforms
W224B
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
June 12, 2001
1W224B
Features
Maximized EMI suppression using Cypress’s Spread
Spectrum technology (–0.5% and –1.0%)
Single chip system FTG for Mobile Intel
Platforms
Three CPU outputs
Seven copies of PCI clock (one Free Running)
Seven SDRAM clock (one DCLK for Memory Hub)
Two copies of 48-MHz clock (non-spread spectrum) op-
timized for USB reference input and video DOT clock
Three 3V66 Hublink/AGP outputs
One VCH clock (48-MHz non-SSC or 66.67-MHz SSC)
Two APIC outputs
One buffered reference output
Supports frequencies up to 133 MHz
Supports 5% and 10% overclocking
SMBus interface for programming
Power management control inputs
Key Specifications
CPU, SDRAM Outputs Cycle-to-Cycle Jitter:.............. 250 ps
APIC, 48-MHz, 3V66, PCI Outputs
Cycle-to-Cycle Jitter:...................................................500 ps
CPU Output Skew: ......................................................150 ps
3V66 Output Skew:......................................................175 ps
APIC, SDRAM Output Skew:.......................................250 ps
PCI Output Skew:........................................................500 ps
VDDQ3 (REF, PCI, 3V66, 48 MHz, SDRAM: .........3.3V ±5%
VDDQ2 (CPU, APIC):.............................................2.5V ±5%
Intel is a registered trademark of Intel Corporation.
Table 1. Pin Selectable Functions
TEST#
FS1
0
x
0
x
1
0
1
0
1
1
1
1
FS0
0
1
0
1
0
1
CPU
SDRAM
Three-state
Test
100 MHz
100 MHz
133 MHz
100 MHz
Three-state
Test
66 MHz
100 MHz
133 MHz
133 MHz
Block Diagram
Pin Configuration
VDD_REF
REF
VDD_APIC
APIC0:1
CPU0
CPU_F1:2
PCI_F
XTAL
OSC
PLL Ref Freq
X2
X1
VDD_PCI
USB (48MHz)
VCH_CLK
VDD_CPU
CPU_STP#
SCLK
PCI1:6
PCI_STP#
CStop
CStop
PLL 1
SMBus
Logic
DOT (48MHz)
PLL2
PWR_DWN#
FS0:1
VDD_48MHz
SDATA
VDD_SDRAM
SDRAM0:5
DCLK
VDD_3V66
3V66_0:1
3V66_AGP
Divider
Network
REF
VDD_REF
X1
X2
GND_REF
GND_3V66
3V66_0
3V66_1
3V66_AGP
VDD_3V66
PCI_STP#
PCI_F
PCI1
GND_PCI
PCI2
PCI3
VDD_PCI
PCI4
PCI5
PCI6
GND_PCI
VDD_CORE
GND_CORE
GND_48MHz
W
GND_APIC
APIC0
APIC1
VDD_APIC
CPU0
VDD_CPU
CPU_F1
CPU_F2
GND_CPU
GND_SDRAM
SDRAM0
SDRAM1
VDD_SDRAM
SDRAM2
SDRAM3
GND_SDRAM
SDRAM4
SDRAM5
DCLK
VDD_SDRAM
VCH_CLK
VDD_VCH
CPU_STP#
TEST#
PWR_DWN#
SCLK
SDATA
FS1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
USB
DOT
VDD_48MHz
FS0
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