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參數(shù)資料
| 型號(hào)： | W163-15G |
| 英文描述： | FIVE DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|SOP|8PIN|PLASTIC |
| 中文描述： | 五分布式輸出時(shí)鐘驅(qū)動(dòng)器|的CMOS |專科| 8引腳|塑料 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大?。?/td> | 109K |
| 代理商： | W163-15G |
Spread Aware, Zero Delay Buffer
W163
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
February 21, 2000, rev. *A
Features
Spread Aware—designed to work with SSFTG
reference signals
Outputs may be three-stated
Available in 8-pin SOIC package
Extra strength output drive available (-15 version)
Internal feedback maximized the number of outputs
available in 8-pin package
Key Specifications
Operating Voltage: ................................................3.3V±10%
Operating Range: ................................10 < f
OUT
< 133 MHz
Cycle-to-Cycle Jitter: ..................................................200 ps
Output-to-Output Skew: ..............................................250 ps
Device-to-Device Skew:...............................................700 ps
Propagation Delay:......................................................350 ps
Spread Aware is a trademark of Cypress Semiconductor Corporation.
Block Diagram
Pin Configuration
Q0
PLL
REF
Q1
Q2
Q3
QFB
QFB
Q3
VDD
Q2
8
7
6
5
REF
Q0
Q1
GND
1
2
3
4
SOIC
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