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參數資料
| 型號： | VX-700-ECT-KEAN-166M628600 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, 166.6286 MHz, LVPECL OUTPUT |
| 封裝： | ROHS COMPLIANT, HERMETIC SEALED, LCC PACKAGE-6 |
| 文件頁數： | 2/6頁 |
| 文件大小： | 467K |
| 代理商： | VX-700-ECT-KEAN-166M628600 |
Performance Specifications
Table 1. Electrical Performance
Parameter
Symbol
Min
Typical
Maximum
Units
Supply
Voltage1
V
DD
3.135
3.3
3.465
V
Current (No Load)
I
DD
50
90
mA
Frequency
Nominal Frequency2
f
N
77.7600
200
MHz
Absolute Pull Range 3,6
APR
±50
ppm
Linearity3
Lin
5
10
%
Gain Transfer Positive3 (See pg 5)
K
V
+65
ppm/V
Temperature Stability3
f
STAB
±20
ppm
Outputs
Output Logic Levels3
Output Logic High
Output Logic Low
V
OH
V
OL
V
DD
-1.025
V
DD
-1.810
V
DD
-0.950
V
DD
-1.700
V
DD
-0.880
V
DD
-1.620
V
Current
I
OUT
20
mA
Rise Time4
Fall Time
t
R
t
F
1
ns
Symmetry3
SYM
45
50
55
%
Jitter (12 kHz - 20 MHz BW)155.52MHz5
фJ
0.3
0.5
ps
Jitter (50 kHz - 80 MHz BW)155.52MHz5
фJ
0.5
0.7
ps
Period Jitter, RMS (155.520 MHz)7
фJ
3.0
ps
Period Jitter, Peak - Peak (155.520MHz)7
фJ
20
ps
Spurious Suppression2
-80
dBc
Control Voltage
Control Voltage Range for APR
V
C
0.3
3.0
V
Control Voltage Input Impedance
Z
IN
10
MΩ
Control Voltage Modulation BW
BW
10
20
kHz
Enable/Disable
Output Enabled, Option A 8
Output Disabled, Option A
V
IH
V
IL
0.7*V
DD
0.3*V
DD
V
Output Enabled, Option C 8
Output Disabled, Option C
V
IL
V
IH
0.7*V
DD
0.2*V
DD
Operating Temperature
T
OP
0/70 or -40/85
°C
Package Size
5.0 x 7.5 x 1.8
mm
Fig 1: Test Circuit
Fig 2: LVPECL Waveform
The VX-700 power supply should be filtered, eg, 0.1 and 0.01uF to ground
1]
See Standard Frequencies and Ordering Information tables for more specific information
2]
Parameters are tested with production test circuit below (Fig 1).
3]
Measured from 20% to 80% of a full output swing (Fig 2).
4]
Integrated across stated bandwidth.
5]
Tested with Vc = 0.3V to 3.0V unless otherwise stated in part description
6]
Broadband Period Jitter measured using Lecroy Wavemaster 8600A 6 GHz Oscilloscope, 25K samples taken. See application note.
7]
Output is Enabled if E/D is left floating
8]
SYM = 100 x t
A / tR
t
F
t
R
t
A
t
R
Page2
Rev: 11/24/2009
Vectron International 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 http://www.vectron.com
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