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參數(shù)資料
| 型號(hào)： | VV5410 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Mono and Colour Digital Video CMOS Image Sensors |
| 中文描述： | 莫諾和數(shù)字視頻彩色CMOS圖像傳感器 |
| 文件頁數(shù)： | 6/105頁 |
| 文件大?。?/td> | 489K |
| 代理商： | VV5410 |
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VV5410 & VV6410
Introduction
cd5410-6410f-3-0.fm
Commercial in confidence
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2.3.1
Along with the pixel data, codes representing the start and end of fields and the start and end of lines are embedded within the
video data stream to allow a co-processor to synchronise with video data the camera module is generating. Section 8. defines the
format for the output video data stream.
Digital Data Bus
2.3.2
To complement the embedded control sequences the data qualification clock (QCK), the line start signal (LST) and the field start
signal (FST) signals can be independently set-up as follows:
Frame Grabber Control Signals
1. Disabled
2. Free-running.
3. Qualify only the control sequences and the pixel data.
4. Qualify the pixel data only
There is also the choice of two different QCK frequencies where one is twice the frequency of the other.
1. Fast QCK: the falling edge of the clock qualifies every 8, 5 or 4 bit blocks of data that makes up a pixel value.
2. Slow QCK: the rising edge qualifies 1st, 3rd, 5th, etc. blocks of data that make up a pixel value while the falling edge quali-
fies the 2nd, 4th, 6th etc. blocks of data. For example in 4-wire mode the rising edge of the clock qualifies the most signifi-
cant nibbles while the falling edge of the clock qualifies the least significant nibbles.
2.3.3
The 2-wire serial interface provides complete control over sensor setup and operation. Two serial interface broadcast addresses
are supported. One allows all sensors to be written to in parallel while the other allows all sensors and co-processors to be written
to in parallel.
2-wire Serial Interface
Section 9. defines the serial interface communications protocol and the register map of all the locations which can be accessed
via the serial interface.
Figure 1 : Block Diagram of VV5410/VV6410 Image Sensor (5-wire output)
OUTPUT
FORMAT
D[4:0]
QCK
LST
FST
SDA
SCL
OEB
CLKI
RESETB
IMAGE
FORMAT
EXPOSURE
CONTROL
SERIAL
INTERFACE
OFFSET
CANCELLATION
Digital Logic
Y-
DECODER
VREGS,
AUDIO AMP.,
& REFS
PHOTO DIODE
ARRAY
Column ADC
Readout
Structure
Analogue Core
X-Decoder
SRAM line store
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VV5430C001 | Monochrome Analog Output CMOS Image Sensors |
| VV5430 | Integrated CMOS Image Sensor with support for ADC and external control via serial interface |
| VV6410C036 | DUAL-MODE DIGITAL CAMERA CHIPSET |
| VV6410 | XTAL MTL T/H HC49/US |
| VV6444 | Low Cost Digital Camera (LCDC) Chipset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VV5410C036 | 制造商:STMicroelectronics 功能描述:IMAGE SENSOR MONOCHROME CMOS 352X288PIXELS 36CLCC - Bulk |
| VV5430 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated CMOS Image Sensor with support for ADC and external control via serial interface |
| VV5430C001 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Monochrome Analog Output CMOS Image Sensors |
| VV5501C001 | 功能描述:視頻 IC Monochrome Sensor RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| VV5F3-30-041 | 制造商:SMC Corporation of America 功能描述:Manifold Base for VF series, base mt, 1/4 inch |
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