VV5404 & VV6404
CD5404-6404F-A
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5.
Serial Control Bus
5.1
Writing configuration information to the video sensor and reading both sensor status and configuration information
back from the sensor is performed via the 2-wire serial interface.
Communication using the serial bus centres around a number of registers internal to the video sensor. These
registers store sensor status, set-up, exposure and system information. Most of the registers are read/write allowing
the receiving equipment to change their contents. Others (such as the chip id) are read only.
The main features of the serial interface include:
Variable length read/write messages.
Indexed addressing of information source or destination within the sensor.
Automatic update of the index after a read of write message.
Message abort with negative acknowledge from the master.
Byte oriented messages.
The contents of all internal registers accessible via the serial control bus are encapsulated in each start-of-field line -
see Section 4.3.4.
General Description
5.2
The video processor must perform the role of a communications master and the camera acts as either a slave receiver
or transmitter.The communication from host to camera takes the form of 8-bit data with a maximum serial clock video
processor frequency of up to 100 kHz. Since the serial clock is generated by the host it determines the data transfer
rate. The bus address for the sensor in VV6404 is 20
H
and for the serial E
2
PROM containing the defect map it is A0
H
.
Data transfer protocol on the bus is shown below.
Serial Communication Protocol
5.3
Information is packed in 8-bit packets (bytes) always followed by an acknowledge bit. The internal data is produced
by sampling sdaat a rising edge of scl The external data must be stable during the high period of scl The exceptions
to this are start(S) or stop (P) conditions when sda falls or rises respectively, while sclis high.
A message contains at least two bytes preceded by a startcondition and followed by either a stopor repeated start,
(Sr), ollowed by another message.
The first byte contains the device address byte which includes the data direction read, r), ~write (~w), bit. The device
address of VV6404 is fixed as 0010_000_[lsb]
2
. The lsb of the address byte indicates the direction of the message.
If the lsb is set high then the master will read data from the slave and if the lsb is reset low then the master will write
data to the slave. After the r,~wbit is sampled, the data direction cannot be changed, until the next address byte with
a new r,~wbit is received.
The byte following the address byte contains the address of the first data byte (also referred to as the index). The
serial interface can address up to 128, byte registers. If the msb of the second byte is set the automatic increment
feature of the address index is selected.
Data Format
1
2
7
8
A
Start condition
Stop condition
SDA
SCL
Acknowledge
P
S
3
4
5
6
Address or data byte
MSB
LSB
Figure 17 : Serial Interface Data Transfer Protocol